Hi Daniel,
On 10/24/2014 10:23 PM, Daniel Drake wrote:
> On Sun, Oct 19, 2014 at 9:32 PM, Chanwoo Choi wrote:
>> This patch adds new exynos4415.dtsi to support Exynos4415 SoC
>> based on Cortex-A9 quad cores and includes following dt nodes:
>
> There's a lot in common between your new exynos4415
On Fri, Oct 24, 2014 at 7:34 AM, Marek Szyprowski
wrote:
> Well, I also thought about such approach, but there are some fundamental
> differences:
> interrupt and clock controllers are completely different. Using a common
> exynos4.dtsi
> and overriding them in every node will result in a code, wh
Hello,
On 2014-10-24 15:23, Daniel Drake wrote:
On Sun, Oct 19, 2014 at 9:32 PM, Chanwoo Choi wrote:
This patch adds new exynos4415.dtsi to support Exynos4415 SoC
based on Cortex-A9 quad cores and includes following dt nodes:
There's a lot in common between your new exynos4415.dtsi and the
ex
On 24.10.2014 15:23, Daniel Drake wrote:
> On Sun, Oct 19, 2014 at 9:32 PM, Chanwoo Choi wrote:
>> This patch adds new exynos4415.dtsi to support Exynos4415 SoC
>> based on Cortex-A9 quad cores and includes following dt nodes:
>
> There's a lot in common between your new exynos4415.dtsi and the
>
On Sun, Oct 19, 2014 at 9:32 PM, Chanwoo Choi wrote:
> This patch adds new exynos4415.dtsi to support Exynos4415 SoC
> based on Cortex-A9 quad cores and includes following dt nodes:
There's a lot in common between your new exynos4415.dtsi and the
existing exynos4.dtsi.
Would it make more sense fo
This patch adds new exynos4415.dtsi to support Exynos4415 SoC
based on Cortex-A9 quad cores and includes following dt nodes:
- GIC interrupt controller (GIC-400)
- Pinctrl to control three GPIO parts
- CMU (Clock Management Unit) for CMU/CMU_DMC/AUDSS
- CPU information (Cortex-A9 quad cores)
- UAR
