Re: [PATCH v2 3/5] pinctrl: exynos: Fix GPIO setup failure because domain clock being gated

On pon, 2014-12-01 at 23:34 +0900, Tomasz Figa wrote: > 2014-12-01 17:37 GMT+09:00 Krzysztof Kozlowski : > > > > On nie, 2014-11-30 at 21:19 +0900, Tomasz Figa wrote: > >> Hi Krzysztof, > >> (...) > > > >> Also isn't a similar problem happening due to power domains? I believe > >> the whole maudio

Re: [PATCH v2 3/5] pinctrl: exynos: Fix GPIO setup failure because domain clock being gated

On pon, 2014-12-01 at 23:34 +0900, Tomasz Figa wrote: > 2014-12-01 17:37 GMT+09:00 Krzysztof Kozlowski : > > > > On nie, 2014-11-30 at 21:19 +0900, Tomasz Figa wrote: > >> Hi Krzysztof, > >> > >> 2014-11-28 23:08 GMT+09:00 Krzysztof Kozlowski : > >> > On pią, 2014-11-28 at 15:04 +0100, Linus Wallei

Re: [PATCH v2 3/5] pinctrl: exynos: Fix GPIO setup failure because domain clock being gated

2014-12-01 17:37 GMT+09:00 Krzysztof Kozlowski : > > On nie, 2014-11-30 at 21:19 +0900, Tomasz Figa wrote: >> Hi Krzysztof, >> >> 2014-11-28 23:08 GMT+09:00 Krzysztof Kozlowski : >> > On pią, 2014-11-28 at 15:04 +0100, Linus Walleij wrote: >> >> On Wed, Nov 26, 2014 at 3:24 PM, Krzysztof Kozlowski

Re: [PATCH v2 3/5] pinctrl: exynos: Fix GPIO setup failure because domain clock being gated

On nie, 2014-11-30 at 21:19 +0900, Tomasz Figa wrote: > Hi Krzysztof, > > 2014-11-28 23:08 GMT+09:00 Krzysztof Kozlowski : > > On pią, 2014-11-28 at 15:04 +0100, Linus Walleij wrote: > >> On Wed, Nov 26, 2014 at 3:24 PM, Krzysztof Kozlowski > >> wrote: > >> > >> > The audio subsystem on Exynos 5

Re: [PATCH v2 3/5] pinctrl: exynos: Fix GPIO setup failure because domain clock being gated

Hi Krzysztof, 2014-11-28 23:08 GMT+09:00 Krzysztof Kozlowski : > On pią, 2014-11-28 at 15:04 +0100, Linus Walleij wrote: >> On Wed, Nov 26, 2014 at 3:24 PM, Krzysztof Kozlowski >> wrote: >> >> > The audio subsystem on Exynos 5420 has separate clocks and GPIO. To >> > operate properly on GPIOs the

Re: [PATCH v2 3/5] pinctrl: exynos: Fix GPIO setup failure because domain clock being gated

On pią, 2014-11-28 at 15:04 +0100, Linus Walleij wrote: > On Wed, Nov 26, 2014 at 3:24 PM, Krzysztof Kozlowski > wrote: > > > The audio subsystem on Exynos 5420 has separate clocks and GPIO. To > > operate properly on GPIOs the main block clock 'mau_epll' must be > > enabled. > > > > This was obs

Re: [PATCH v2 3/5] pinctrl: exynos: Fix GPIO setup failure because domain clock being gated

On Wed, Nov 26, 2014 at 3:24 PM, Krzysztof Kozlowski wrote: > The audio subsystem on Exynos 5420 has separate clocks and GPIO. To > operate properly on GPIOs the main block clock 'mau_epll' must be > enabled. > > This was observed on Peach Pi/Pit and Arndale Octa (after enabling i2s0) > after int

[PATCH v2 3/5] pinctrl: exynos: Fix GPIO setup failure because domain clock being gated

The audio subsystem on Exynos 5420 has separate clocks and GPIO. To operate properly on GPIOs the main block clock 'mau_epll' must be enabled. This was observed on Peach Pi/Pit and Arndale Octa (after enabling i2s0) after introducing runtime PM to pl330 DMA driver. After that commit the 'mau_epll'