.@arm.linux.org.uk;
> sachin.ka...@linaro.org; Kyungmin Park; kgene@samsung.com;
> thomas.abra...@linaro.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH v3 3/4] ARM: EXYNOS: Enable PMUs for exynos4
>
> On Wed, Aug 29, 2012 at 02:14:56AM +0100, Chanho Park wrote:
> &g
On Wed, Aug 29, 2012 at 02:14:56AM +0100, Chanho Park wrote:
> This patch define irq numbers of ARM performance monitoring unit for exynos4.
> The number of CPU cores and PMU irq numbers are vary according to soc types.
> So we need to identify each soc type using soc_is_xxx function and define the
; will.dea...@arm.com; thomas.abra...@linaro.org; Kyungmin Park
> Subject: Re: [PATCH v3 3/4] ARM: EXYNOS: Enable PMUs for exynos4
>
> Hi Chanho,
>
> On 29 August 2012 06:44, Chanho Park
> wrote:
> > This patch define irq numbers of ARM performance monitoring unit for
>
Hi Chanho,
On 29 August 2012 06:44, Chanho Park wrote:
> This patch define irq numbers of ARM performance monitoring unit for exynos4.
> The number of CPU cores and PMU irq numbers are vary according to soc types.
> So we need to identify each soc type using soc_is_xxx function and define the
> p
This patch define irq numbers of ARM performance monitoring unit for exynos4.
The number of CPU cores and PMU irq numbers are vary according to soc types.
So we need to identify each soc type using soc_is_xxx function and define the
pmu irqs dynamically. In case of exynos4412, there are 4 cpu cores