Hi Tomasz,
On 04/08/2014 04:37 PM, Tomasz Stanislawski wrote:
The HDMIPHY (physical interface) is controlled by a single
bit in a power controller's regiter. It was implemented
as clock. It was a simple but effective hack.
This power controller register has also bits to control HDMI clock
Hi Andrzej,
On 9 April 2014 16:00, Andrzej Hajda a.ha...@samsung.com wrote:
Hi Tomasz,
On 04/08/2014 04:37 PM, Tomasz Stanislawski wrote:
The HDMIPHY (physical interface) is controlled by a single
bit in a power controller's regiter. It was implemented
as clock. It was a simple but
Hi Andrzej,
This issue could be solved by exporting a regmap from PMU driver
or Exynos clock provider for the usage by exynos-simple-phy.
The operations on PHYs from exynos-simple-phy provider would
be chained to PMU driver and protected by a spinlock in the regmap.
Luckily, the divider is not
The HDMIPHY (physical interface) is controlled by a single
bit in a power controller's regiter. It was implemented
as clock. It was a simple but effective hack.
This patch makes HDMI driver to control HDMIPHY via PHY interface.
Signed-off-by: Tomasz Stanislawski t.stanisl...@samsung.com
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