On Wed, Feb 15, 2023 at 08:59:18PM -0800, Vineet Gupta wrote:
> On 2/10/23 09:06, Matthew Wilcox wrote:
> > I see a discrepancy here ...
> >
> > arch/arc/include/asm/shmparam.h:
> > /* Handle upto 2 cache bins */
> > #define SHMLBA (2 * PAGE_SIZE)
> >
> > arch/arc/include/asm/cacheflush.h:
> > #
On 2/10/23 09:06, Matthew Wilcox wrote:
I see a discrepancy here ...
arch/arc/include/asm/shmparam.h:
/* Handle upto 2 cache bins */
#define SHMLBA (2 * PAGE_SIZE)
arch/arc/include/asm/cacheflush.h:
#define CACHE_COLORS_NUM4
The initial aliasing dcache support assumed 2 colors but wa
I see a discrepancy here ...
arch/arc/include/asm/shmparam.h:
/* Handle upto 2 cache bins */
#define SHMLBA (2 * PAGE_SIZE)
arch/arc/include/asm/cacheflush.h:
#define CACHE_COLORS_NUM4
(there are some other problems with the arc cache flushing code; I'm
working on patches to address th