Hi,
On 01/06/2014 09:32 PM, k...@kalganov.com wrote:
On Wednesday, December 4, 2013 1:10:55 PM UTC+1, oli...@schinagl.nl wrote:
From: Oliver Schinagl
This patch adds sunxi sata support to A10 and A20 boards that have such
a connector. Some boards also feature a regulator via a GPIO and sup
Hi,
On Monday 06 January 2014 04:36 AM, Hans de Goede wrote:
> The phy-core allows phy_init and phy_power_on to be called multiple times,
> but before this patch -ENOSUPP from phy_pm_runtime_get_sync would be
> propagated to the caller for the 2nd and later calls.
Thanks for fixing this. Have one
On Tuesday 07 January 2014 02:26 PM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Monday 06 January 2014 04:36 AM, Hans de Goede wrote:
>> The phy-core allows phy_init and phy_power_on to be called multiple times,
>> but before this patch -ENOSUPP from phy_pm_runtime_get_sync would be
>> propagated
Hi,
On 01/07/2014 09:56 AM, Kishon Vijay Abraham I wrote:
Hi,
On Monday 06 January 2014 04:36 AM, Hans de Goede wrote:
The phy-core allows phy_init and phy_power_on to be called multiple times,
but before this patch -ENOSUPP from phy_pm_runtime_get_sync would be
propagated to the caller for th
Hi,
On Monday 06 January 2014 04:36 AM, Hans de Goede wrote:
> Printing an error on probe-deferral clearly is not the right thing to do.
> While at it I've also silenced the error in case of -ENODATA, so that
> devm_phy_get can be used to get an optional phy without causing errors to
What do you
Hi,
On 01/07/2014 10:31 AM, Kishon Vijay Abraham I wrote:
Hi,
On Monday 06 January 2014 04:36 AM, Hans de Goede wrote:
Printing an error on probe-deferral clearly is not the right thing to do.
While at it I've also silenced the error in case of -ENODATA, so that
devm_phy_get can be used to get
Hi,
On Thu, Jan 2, 2014 at 9:11 PM, srinivas kandagatla
wrote:
> Hi Chen,
>
> On 24/12/13 03:27, Chen-Yu Tsai wrote:
>> Srinivas,
>>
>> Let's keep platform data as of_data, so SoC compatibles can pass
>> hardware feature flags for cores that don't support auto-detection.
>
> I understand your con
Hi ,
I have tried many kernels from different sources including linux-sunxi main
repository.
can any one please tell if there is a kernel 3.4 based which can detect and
make
available the 4 GB nand flash of MELE M5.
regds
Rajesh Kumar Mallah.
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On Mon, 6 Jan 2014 17:30:44 -0800 Neal Peacock
wrote:
> On Jan 6, 2014 4:57 PM, "jonsm...@gmail.com"
> wrote:
> >
> > Since Allwinner can't be bothered to supply a armhf h.264 encoder
> > build, can libhybris link to the Allwinner h.264 armel binary and
> > make it work in an armhf system?
>
> Y
On Mon, 6 Jan 2014 16:57:56 -0500 "jonsm...@gmail.com"
wrote:
> Since Allwinner can't be bothered to supply a armhf h.264 encoder
Did the people that have the right$ to ask Allwinner asked?
Especially referencing the need of armhf, not armel.
> build, can libhybris link to the Allwinner h.264 a
On Tuesday, January 7, 2014 9:05:19 AM UTC+1, Hans de Goede wrote:
> Hi,
>
>
>
> On 01/06/2014 09:32 PM, k...@kalganov.com wrote:
>
> > On Wednesday, December 4, 2013 1:10:55 PM UTC+1, oli...@schinagl.nl wrote:
>
> >> From: Oliver Schinagl
>
> >>
>
> >>
>
> >>
>
> >> This patch adds sunxi
Hi,
On 01/07/2014 04:29 PM, k...@kalganov.com wrote:
On Tuesday, January 7, 2014 9:05:19 AM UTC+1, Hans de Goede wrote:
Hi,
On 01/06/2014 09:32 PM, k...@kalganov.com wrote:
On Wednesday, December 4, 2013 1:10:55 PM UTC+1, oli...@schinagl.nl wrote:
From: Oliver Schinagl
T
DEAR HANS:
I HAVE INSTALLED THE FEDORA 19 REMIX ON MY CHEAP CHINESE TABLETS.
HAVE 2 OF THEM, AND BOTH ARE 7" A13 BASED TABLETS.
THE FEDORA BOOTS FINE, I HAVE THE OTG USB CONNECTED TO MY WIRELESS
KEYBOARD/MOUSE AND WORKS HAPPY.
WIFI IS NOT DETECTED, AND I HAVE NO IDEA HOW TO MAKE IT WORK ...
I N
DEAR HANS:
JUST CAME ACROSS THIS FANTASTIC GROUP AND DOWNLOADED THE LAST VERSION OF FEDORA.
I HAVE 2 CHEAP CHINESE TABLETS, BOTH 7" AND A13 BASED.
RUNNING ANDROID VERY HAPPY.
WITH THE FEDORA AND USING THE a13_mid CONFIG BOARD, BOTH TABLETS BOOTS
FANTASTIC.
HOWEVER, NONE OF THEM DETECTS THE WI
In various cases errors may be expected, ie probe-deferral or a call to
phy_get from a driver where the use of a phy is optional.
Rather then adding all sort of complicated checks for this, and/or adding
special functions like devm_phy_get_optional, simply don't log an error,
and let deciding if g
The phy-core allows phy_init and phy_power_on to be called multiple times,
but before this patch -ENOSUPP from phy_pm_runtime_get_sync would be
propagated to the caller for the 2nd and later calls.
Signed-off-by: Hans de Goede
---
drivers/phy/phy-core.c | 4
1 file changed, 4 insertions(+)
Hi Kishon,
Here is v2 of my phy-core patches. I've decided to fix the undesired error
logging problem by simple removing error logging from the core. IMHO
error-logging should be left to the drivers calling the core.
Thanks & Regards,
Hans
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Hi,
On 01/06/2014 04:45 PM, Mark Rutland wrote:
On Sun, Jan 05, 2014 at 11:04:39PM +, Hans de Goede wrote:
Add support for ohci-platform instantiation from devicetree, including
optionally getting clks and a phy from devicetree, and enabling / disabling
those on power_on / off.
This should
Hi,
On 01/06/2014 04:49 PM, Alan Stern wrote:
On Mon, 6 Jan 2014, Hans de Goede wrote:
Add support for ohci-platform instantiation from devicetree, including
optionally getting clks and a phy from devicetree, and enabling / disabling
those on power_on / off.
This should allow using ohci-platf
On Tuesday 07 January 2014 22:03:11 Hans de Goede wrote:
> >> +
> >> +Optional properties:
> >> + - clocks: array of clocks
> >> + - clock-names: clock names "ahb" and/or "ohci"
> >
> > Where does "ahb" come from, what does it mean, and how is it relevant
> > to generic platforms?
>
> ahb is an AR
Hi,
On 01/07/2014 10:16 PM, Arnd Bergmann wrote:
On Tuesday 07 January 2014 22:03:11 Hans de Goede wrote:
+
+Optional properties:
+ - clocks: array of clocks
+ - clock-names: clock names "ahb" and/or "ohci"
Where does "ahb" come from, what does it mean, and how is it relevant
to generic platf
Hi everyone,
One of the great strength of Allwinner's kernel is that it behaves
pretty much like DT does: their kernel image is mostly generic, and
all the device specific part is stored in a binary file (compiled from
a FEX file), that gets loaded together with the kernel by the
bootloader.
The
Hi Chen-Yu,
On Mon, Jan 06, 2014 at 01:58:05PM +0800, Chen-Yu Tsai wrote:
> sunxi clock drivers use dt node name as clock name, but clock
> nodes should be named clk@X, so the names would be the same.
> Let the drivers read clock names from dt clock-output-names
> property.
>
> Signed-off-by: Che
On Mon, Jan 06, 2014 at 01:58:06PM +0800, Chen-Yu Tsai wrote:
> Some factor clocks, such as the parent clock of pll5 and pll6, have
> multiple output names. Use the last name as the name for the clock
> itself.
>
> Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Mike, Emilio,
This changes
On Mon, Jan 06, 2014 at 01:58:07PM +0800, Chen-Yu Tsai wrote:
> Divs clocks consist of a parent factor clock with multiple outputs,
> and seperate clocks for each output. Get the name of the parent
> clock from the parent factor clock, instead of the DT node name.
>
> Signed-off-by: Chen-Yu Tsai
On Mon, Jan 06, 2014 at 01:58:08PM +0800, Chen-Yu Tsai wrote:
> Device tree naming conventions state that node names should match
> node function. Change fully functioning clock nodes to match.
>
> Also add the output name for pll5 to use as the clock name.
>
> Signed-off-by: Chen-Yu Tsai
> ---
On Tue, Jan 07, 2014 at 11:16:46PM +0100, Maxime Ripard wrote:
> On Mon, Jan 06, 2014 at 01:58:06PM +0800, Chen-Yu Tsai wrote:
> > Some factor clocks, such as the parent clock of pll5 and pll6, have
> > multiple output names. Use the last name as the name for the clock
> > itself.
> >
> > Signed-o
Hi,
On Mon, Jan 06, 2014 at 01:58:12PM +0800, Chen-Yu Tsai wrote:
> The Cubietruck makes use of the first three i2c controllers found on the
> Allwinner A20; i2c-0 is used internally for the PMIC, i2c-1 is exposed on
> the board headers, and i2c-2 is used for DDC on the VGA connector. This
> patch
Hello,
On 7 January 2014 07:38, TsvetanUsunov wrote:
> LVDS works, but as I reported a month ago LVDS driver is buggy, if the LVDS
> is one channel clock is OK, if the LVDS is two channels (like for Full HD
> 1980x1080p LCDs) the clock gets divided by the number of the channels which
> is wrong a
Hi,
I think there is no much reason to use dummy clock names.
It is better to access them by index, and use clock-names for documentation
only.
Then it can support arbitrary number of clocks easily.
num_clks = of_count_phandle_with_args(np, "clocks", "#clock-cells");
for ( id = 0; id < num_clks; i
On Wed, Jan 8, 2014 at 6:38 AM, Maxime Ripard
wrote:
> On Mon, Jan 06, 2014 at 01:58:08PM +0800, Chen-Yu Tsai wrote:
>> Device tree naming conventions state that node names should match
>> node function. Change fully functioning clock nodes to match.
>>
>> Also add the output name for pll5 to use
Hi,
On Wed, Jan 8, 2014 at 6:14 AM, Maxime Ripard
wrote:
> Hi Chen-Yu,
>
> On Mon, Jan 06, 2014 at 01:58:05PM +0800, Chen-Yu Tsai wrote:
>> sunxi clock drivers use dt node name as clock name, but clock
>> nodes should be named clk@X, so the names would be the same.
>> Let the drivers read clock n
Nelson,
Emails sent in all caps are generally not good netiquette, as this is
approximately the equivalent of shouting.
That said, I just successfully solved a similar problem on similar
hardware. There are a few pieces of information to acquire before we're
able to help you.
First off, what
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