On 20/04/14 10:48, Hans de Goede wrote:
brcmfmac has been broken on my cubietruck with a BCM43362:
brcmfmac: brcmf_chip_recognition: found AXI chip: BCM43362, rev=1
brcmfmac: brcmf_c_preinit_dcmds: Firmware version = wl0:
Apr 22 2013 14:50:00 version 5.90.195.89.6 FWID 01-b30a427d
Hi All,
Here is v8 of the sunxi-mmc patch-set David Lanzendörfer and I have been
working on.
The first 2 patches are depenencies which should go in through the clk tree,
Mike can you pick these 2 up please ? :
clk: sunxi: factors: automatic reparenting support
Is uncontroversial and has been
From: David Lanzendörfer david.lanzendoer...@o2s.ch
Add nodes for the 4 mmc controllers found on A10 SoCs to
arch/arm/boot/dts/sun4i-a10.dtsi.
Signed-off-by: David Lanzendörfer david.lanzendoer...@o2s.ch
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 36
From: Emilio López emi...@elopez.com.ar
HdG: add header exporting clk_sunxi_mmc_phase_control
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/clk/sunxi/clk-sunxi.c | 35 +++
include/linux/clk/sunxi.h
mmc0 is the only controller actually being used on boards, so limit the
pin-muxing options to that.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi
From: David Lanzendörfer david.lanzendoer...@o2s.ch
The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in
designware idmac controller, which is identical to the one found in the mmc-dw
hosts. However the rest of the host is not identical to mmc-dw, it deals with
sending stop
From: Emilio López emi...@elopez.com.ar
This commit implements .determine_rate, so that our factor clocks can be
reparented when needed.
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/clk/sunxi/clk-factors.c | 36
This adds pin-muxing info for the mmc controller / port combinations which
are known to be used on actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 14 ++
arch/arm/boot/dts/sun5i-a13.dtsi | 7 +++
2 files changed, 21
The cd pin settings have been taken from the original firmware fex files,
and have been confirmed to work on the actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 32
Add nodes for the 4 mmc controllers found on A20 SoCs to
arch/arm/boot/dts/sun7i-a20.dtsi.
Signed-off-by: David Lanzendörfer david.lanzendoer...@o2s.ch
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun7i-a20.dtsi | 36
1 file changed,
Add clk-nodes for the mmc clocks.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index d45efa7..12bcc17
Tested on a subset of these boards, for the others boards the settings match
the ones of the tested boards according to the original firmware fex files.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun4i-a10-a1000.dts | 9 +
The cd pin settings have been taken from the original firmware fex files,
and have been confirmed to work on the actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 9 +
arch/arm/boot/dts/sun7i-a20-cubietruck.dts |
Add a new sun6i-a31-m9 dts file for the Mele M9 / Mele A1000G Quad. These
HTPCs use the same board in a different case, for more details see:
http://linux-sunxi.org/Mele_M9
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/Makefile | 1 +
This adds pin-muxing info for the mmc controller / port combinations which
are known to be used on actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun7i-a20.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git
Tested on a Mele A1000G Quad.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31-m9.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts
b/arch/arm/boot/dts/sun6i-a31-m9.dts
index c95ee77..a188721 100644
---
Add nodes for the 4 mmc controllers found on A31 SoCs to
arch/arm/boot/dts/sun6i-a31.dtsi.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 52
1 file changed, 52 insertions(+)
diff --git
This adds pin-muxing info for the mmc controller / port combinations which
are known to be used on actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi
From: David Lanzendörfer david.lanzendoer...@o2s.ch
Add nodes for the 3 mmc controllers found on A10s SoCs and for the 2 mmc
controllers found on A13 SoCs.
Signed-off-by: David Lanzendörfer david.lanzendoer...@o2s.ch
Signed-off-by: Hans de Goede hdego...@redhat.com
---
On Thu, Apr 10, 2014 at 3:52 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
Check the clk_prepare_enable return value to avoid false positive probe.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Patch applied with Maxime's ACK.
Yours,
Linus Walleij
--
You
On Thu, Apr 10, 2014 at 3:52 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
Disable the clk when failing to probe the pin controller device.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Patch applied with Maxime's ACK.
Yours,
Linus Walleij
--
You
On Thu, Apr 10, 2014 at 3:52 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
Define PL and PM pin macros.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
Patch applied.
Yours,
Linus Walleij
--
You
On Thu, Apr 10, 2014 at 3:52 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
Add support for multiple pin controller instances.
First remove the static definition of the sunxi gpio chip struct and fill
the dynamically struct instead.
Then define a new pin_base field in the
On Thu, Apr 10, 2014 at 3:52 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
The A31 SoC provides both PL and PM pio bank through the R_PIO block.
These pins all support gpio function and can bbe assigned to system
peripherals (like TWI, P2WI, JTAG, ...)
Add new compatible
On Thu, Apr 10, 2014 at 3:52 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
The A31 SoC define a reset line for the R_PIO block which needs to be
deasserted.
Try to retrieve a reset control and deassert if one was found.
Signed-off-by: Boris BREZILLON
On Thu, Apr 10, 2014 at 3:52 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
The A31 SoC has PL and PM banks and thus increase the default ARCH_NR_GPIO.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
On Mon, Apr 21, 2014 at 10:56:59PM +0200, Boris BREZILLON wrote:
Some I2C adapters are only compatible with the SMBus protocol and do not
support standard I2C transfers.
Applied, thanks.
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Hi Hans,
El 22/04/14 08:01, Hans de Goede escribió:
Hi All,
Here is v8 of the sunxi-mmc patch-set David Lanzendörfer and I have been
working on.
The first 2 patches are depenencies which should go in through the clk tree,
Mike can you pick these 2 up please ? :
clk: sunxi: factors:
Hi,
On 04/22/2014 02:07 PM, Emilio López wrote:
Hi Hans,
El 22/04/14 08:01, Hans de Goede escribió:
Hi All,
Here is v8 of the sunxi-mmc patch-set David Lanzendörfer and I have been
working on.
The first 2 patches are depenencies which should go in through the clk tree,
Mike can you
Thanks this guide will help me.
Dennis
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On Thu, 3 Apr 2014 03:15:06 +0530
Rajesh Mallah mallah.raj...@gmail.com wrote:
On Thu, Mar 27, 2014 at 12:12 AM, Siarhei Siamashka
siarhei.siamas...@gmail.com wrote:
On Tue, 25 Mar 2014 03:23:54 +0530
Rajesh Mallah mallah.raj...@gmail.com wrote:
I also observed that a clone of the
Hi all,
I just fixed the scaler issue, but don't really know how to make/publish a
patch - I read a bit about it, but since even the tabs are important, I'd
prefer that someone else does it.
The problem itself - when using standard V4L2 loop for image acquisition
from a camera and using
On 22/04/2014 13:47, Linus Walleij wrote:
On Thu, Apr 10, 2014 at 3:52 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
The A31 SoC provides both PL and PM pio bank through the R_PIO block.
These pins all support gpio function and can bbe assigned to system
peripherals (like
Op 22 apr. 2014, om 15:10 heeft Siarhei Siamashka siarhei.siamas...@gmail.com
het volgende geschreven:
On Thu, 3 Apr 2014 03:15:06 +0530
Rajesh Mallah mallah.raj...@gmail.com wrote:
On Thu, Mar 27, 2014 at 12:12 AM, Siarhei Siamashka
siarhei.siamas...@gmail.com wrote:
On Tue, 25 Mar
On Tuesday 22 April 2014, Linus Walleij wrote:
On Thu, Apr 10, 2014 at 3:52 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
The A31 SoC has PL and PM banks and thus increase the default ARCH_NR_GPIO.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
On Tue, 22 Apr 2014 15:45:23 +0200
Koen Kooi k...@dominion.thruhere.net wrote:
Op 22 apr. 2014, om 15:10 heeft Siarhei Siamashka
siarhei.siamas...@gmail.com het volgende geschreven:
BTW, forgot to mention that I also have tried the BFS scheduler
just for fun. And pushed the patches to this
On Tue, Apr 15, 2014 at 8:41 AM, Chen-Yu Tsai w...@csie.org wrote:
This patch enables gpio-names based gpiod lookup in device tree usage,
which ignores the index passed to gpiod_get_index. If this fails, fall
back to the original function-index (con_id-gpios) based lookup scheme,
for backward
On Tue, Apr 15, 2014 at 8:41 AM, Chen-Yu Tsai w...@csie.org wrote:
This patch provides of_get_gpiod_flags_by_name(), which looks up GPIO
phandles by name only, through gpios/gpio-names, and not by index.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Like Alexandre I have no strong opinion on
Hi Linus,
On Tue, Apr 22, 2014 at 05:00:17PM +0200, Linus Walleij wrote:
On Tue, Apr 15, 2014 at 8:41 AM, Chen-Yu Tsai w...@csie.org wrote:
This patch enables gpio-names based gpiod lookup in device tree usage,
which ignores the index passed to gpiod_get_index. If this fails, fall
back
Maybe this wiki page could be extended to provide some super simplistic
explanation of the minimal actions that are needed to be taken.
Anyway, without having your fix presented as a patch, it is rather
cumbersome to correctly apply your changes to the kernel sources and
test them.
On 20 March 2014 23:53, Jonathan Liu net...@gmail.com wrote:
Standard mode I2C speed is 100 kbit/s and should be used instead of
200 kbit/s which is non-standard.
Signed-off-by: Jonathan Liu net...@gmail.com
---
arch/arm/plat-sunxi/include/plat/i2c.h | 8
1 file changed, 4
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