Hi,
On 05/12/2014 09:34 PM, Maxime Ripard wrote:
> Move the phy initialization and variables declaration to the loop itself,
> since
> it is where it really belongs. Also remove all the temporary variables, we can
> use the structure members directly.
>
> Signed-off-by: Maxime Ripard
> ---
> d
Just an idea: Can the convince the most popular distros to add an automatic
stability test which sends the data to a server? It could be advertised by
e.g. the mod banner. I think thatn then we could become enough data to set
this right.
What a pitty that AllWinner can't provide us with safe number
I'm experiencing hangs in TCP connections on a cubietruck running the
3.4.75 kernel (IOW the "Fedora 20" kernel).
Something like "ssh machine du /home" (with a large enough /home,
e.g. containing the Linux source) rarely finishes without freezing.
The freeze is only for a single TCP connection:
Quoting Maxime Ripard (2014-05-12 12:34:27)
> The A31 USB clock slightly differ from its older counterparts, mostly because
> it has a different gate for each PHY, while the older one had a single gate
> for
> all the phy.
>
> Signed-off-by: Maxime Ripard
> Reviewed-by: Hans de Goede
Acked-by:
Quoting Arnd Bergmann (2014-04-23 06:31:06)
> On Wednesday 23 April 2014 15:17:20 Maxime Ripard wrote:
> > > > +#include
> > > > #include
> > > > #include
> > > >
> > > > @@ -19,9 +20,17 @@
> > > >
> > > > static void __init sun4i_dt_init(void)
> > > > {
> > > > + struct clk *clk;
Quoting Emilio López (2014-05-10 10:22:15)
> Hi Maxime,
>
> El 10/05/14 00:33, Maxime Ripard escribió:
> > Hi everyone,
> >
> > This patchset fixes a few things that have been pending for quite a
> > while in the clock driver.
> >
> > First, it removes the clk_put calls in the clock protection
> >
On Sun, 11 May 2014 22:58:31 +0200
Hans de Goede wrote:
> Hi,
>
> On 05/11/2014 10:43 PM, Hans de Goede wrote:
> > Hi,
> >
> > On 05/11/2014 11:53 AM, Siarhei Siamashka wrote:
> >> It has been confirmed that a substantial percentage of cubieboard2
> >> and cubietruck users are having stability
Hello,
I recently bought a second hand Inet 86vs, selled in France as a Lenco
CoolTab 70.
I tried to compile u-boot arriving at the same settings as Michal but it
didn't work.
However, good news, an image for the A13-Olinuxino worked for me; we have
an a13-olinuxino in our lab so I tried...
t
On Mon, May 12, 2014 at 04:45:08PM -0300, Emilio López wrote:
> >>>+ clk = clk_register_composite(NULL, clk_name,
> >>>+ parents, SUN7I_A20_GMAC_PARENTS,
> >>>+ &mux->hw, &clk_mux_ops,
> >>>+ NULL, NULL,
> >>>+ &gate->hw, &clk_gat
On Mon, 12 May 2014, Maxime Ripard wrote:
> From: Boris BREZILLON
>
> On the Allwinner's A31 SoC the reset line connected to the EHCI IP has to
> be deasserted for the EHCI block to be usable.
>
> Add support for an optional reset controller that will be deasserted on
> power off and asserted o
Hi,
El 12/05/14 16:36, Maxime Ripard escribió:
On Sat, May 10, 2014 at 02:07:07PM -0300, Emilio López wrote:
+
+ clk = clk_register_composite(NULL, clk_name,
+ parents, SUN7I_A20_GMAC_PARENTS,
+ &mux->hw, &clk_mux_ops,
+ NU
On Sat, May 10, 2014 at 02:07:07PM -0300, Emilio López wrote:
> >+
> >+clk = clk_register_composite(NULL, clk_name,
> >+parents, SUN7I_A20_GMAC_PARENTS,
> >+&mux->hw, &clk_mux_ops,
> >+NULL, NULL,
> >+&gate->hw, &cl
From: Boris BREZILLON
On the Allwinner's A31 SoC the reset line connected to the EHCI IP has to
be deasserted for the EHCI block to be usable.
Add support for an optional reset controller that will be deasserted on
power off and asserted on power on.
Signed-off-by: Boris BREZILLON
Signed-off-b
The A31 has two ECHI/OHCI controllers, and one OHCI-only phy-less controller.
Signed-off-by: Maxime Ripard
Reviewed-by: Hans de Goede
---
arch/arm/boot/dts/sun6i-a31.dtsi | 77
1 file changed, 77 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dt
The USB phy controller in the A31 differs mostly from the older controllers
because it has a clock dedicated for each phy, while the older ones were having
a single clock for all the phys.
Signed-off-by: Maxime Ripard
Reviewed-by: Hans de Goede
---
drivers/phy/phy-sun4i-usb.c | 33 +
Hi everyone,
This patchset adds support for the USB controllers found in the
Allwinner A31.
While the design is similar to the earlier Allwinner SoCs that are
already supported, a few details here and there change, like the fact
that the PHYs now have one clock per phy, while it used to be only o
From: Boris BREZILLON
The APP4 EVB1 development boards embeds an A31, together with some NAND, one SD
card slot, and one SDIO + UART WiFi and Bluetooth chip, a few I2C buses, USB,
and a LCD display.
Signed-off-by: Boris BREZILLON
Signed-off-by: Maxime Ripard
Reviewed-by: Hans de Goede
---
ar
The USB clocks of the A31 seems to be parented to the 24MHz oscillator, and
handle the clocks for the USB phys and OHCI devices.
Signed-off-by: Maxime Ripard
Reviewed-by: Hans de Goede
---
arch/arm/boot/dts/sun6i-a31.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm
Move the phy initialization and variables declaration to the loop itself, since
it is where it really belongs. Also remove all the temporary variables, we can
use the structure members directly.
Signed-off-by: Maxime Ripard
---
drivers/phy/phy-sun4i-usb.c | 44 ---
The OHCI controllers used in the Allwinner A31 are asserted in reset using a
global reset controller.
Add optional support for such a controller in the OHCI platform driver.
Signed-off-by: Maxime Ripard
Reviewed-by: Hans de Goede
---
Documentation/devicetree/bindings/usb/usb-ohci.txt | 1 +
d
The A31 USB clock slightly differ from its older counterparts, mostly because
it has a different gate for each PHY, while the older one had a single gate for
all the phy.
Signed-off-by: Maxime Ripard
Reviewed-by: Hans de Goede
---
drivers/clk/sunxi/clk-sunxi.c | 6 ++
1 file changed, 6 inse
On 05/12/2014 02:04 PM, Hans de Goede wrote:
From: David Lanzendörfer
The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in
designware idmac controller, which is identical to the one found in the mmc-dw
hosts. However the rest of the host is not identical to mmc-dw, it deals
On Tue, 6 May 2014 12:34:45 +0300
Siarhei Siamashka wrote:
> Implemented an automated script for running tests at different
> operating points:
> https://github.com/ssvb/cpuburn-arm/blob/master/cpufreq-ljt-stress-test
And also added a script to parse the cpufreq tables from the sunxi-3.4
ker
On Mon, May 12, 2014 at 02:11:06PM +0200, Hans de Goede wrote:
> The R7 tv-dongle is an A10s based hdmi tv dongle, with 1G RAM, 4G nand flash,
> and rtl8189es sdio wifi. It has a standard male hdmi connector, an USB host
> port using an USB-A receptacle and a micro-usb receptacle for both power
> a
On Mon, May 12, 2014 at 05:14:26PM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> On Sat, May 10, 2014 at 8:56 PM, Maxime Ripard
> wrote:
> > The USB phy controller in the A31 differs mostly from the older controllers
> > because it has a clock dedicated for each phy, while the older ones were
> > having
Hi Alan,
On Sat, May 10, 2014 at 10:35:49AM -0400, Alan Stern wrote:
> > @@ -206,6 +208,19 @@ static int ehci_platform_probe(struct platform_device
> > *dev)
> > break;
> > }
> > }
> > +
> > + priv->rst = devm_reset_control_get
On Mon, May 12, 2014 at 02:29:19PM +0200, Hans de Goede wrote:
> Hi,
>
> It isn't. I'm sorry but I don't have time to go and create linux-sunxi.org
> wiki pages for all the devices I have.
Then why bother creating dts files when no-one can find out what devices
they really are for?
Luc Verhaege
On Monday 12 May 2014 14:04:48 Hans de Goede wrote:
> From: David Lanzendörfer
>
> The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in
> designware idmac controller, which is identical to the one found in the mmc-dw
> hosts. However the rest of the host is not identical to m
Hi,
On 05/12/2014 02:15 PM, Luc Verhaegen wrote:
> On Mon, May 12, 2014 at 02:11:06PM +0200, Hans de Goede wrote:
>> The R7 tv-dongle is an A10s based hdmi tv dongle, with 1G RAM, 4G nand flash,
>> and rtl8189es sdio wifi. It has a standard male hdmi connector, an USB host
>> port using an USB-A r
Hi,
On 05/12/2014 02:24 PM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Monday 12 May 2014 05:29 PM, Hans de Goede wrote:
>> Hi,
>>
>> On 05/12/2014 11:14 AM, Chen-Yu Tsai wrote:
>>> Hi,
>>>
>>> On Sat, May 10, 2014 at 8:56 PM, Maxime Ripard
>>> wrote:
The USB phy controller in the A31 diffe
Hi,
On Monday 12 May 2014 05:29 PM, Hans de Goede wrote:
> Hi,
>
> On 05/12/2014 11:14 AM, Chen-Yu Tsai wrote:
>> Hi,
>>
>> On Sat, May 10, 2014 at 8:56 PM, Maxime Ripard
>> wrote:
>>> The USB phy controller in the A31 differs mostly from the older controllers
>>> because it has a clock dedicate
Hi,
On 05/12/2014 10:38 AM, Siarhei Siamashka wrote:
> On Sun, 11 May 2014 10:36:23 +0200
> Hans de Goede wrote:
>
>> I know some people have been working very hard on understanding the dram
>> controller better, but until we get some patches as a result of that, this
>> seems the best route to
On Mon, May 12, 2014 at 02:11:06PM +0200, Hans de Goede wrote:
> The R7 tv-dongle is an A10s based hdmi tv dongle, with 1G RAM, 4G nand flash,
> and rtl8189es sdio wifi. It has a standard male hdmi connector, an USB host
> port using an USB-A receptacle and a micro-usb receptacle for both power
> a
The R7 tv-dongle is an A10s based hdmi tv dongle, with 1G RAM, 4G nand flash,
and rtl8189es sdio wifi. It has a standard male hdmi connector, an USB host
port using an USB-A receptacle and a micro-usb receptacle for both power
and USB OTG.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/Makef
On Mon, 12 May 2014 13:32:32 +0200
Hans de Goede wrote:
> Hi,
>
> On 05/12/2014 09:54 AM, Siarhei Siamashka wrote:
> > On Sun, 11 May 2014 22:47:03 +0200
> > Hans de Goede wrote:
> >
>
>
>
> >> So what is your opinion no the 3th patch in this series which drops the
> >> DRAM clk on the cubi
Hi All,
Here is lucky number v13 of the sunxi-mmc patch-set David Lanzendörfer and I
have been working on, with the __clk_get_hw call moved from sunxi-mmc.c
to clk-sunxi.c where it belongs.
Mike, the first patch in this series modifies clk_sunxi_mmc_phase_control to
take a struct clk * as argumen
__clk_get_hw is supposed to be used by clk providers, not clk consumers.
Signed-off-by: Hans de Goede
---
drivers/clk/sunxi/clk-sunxi.c | 3 ++-
include/linux/clk/sunxi.h | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/
From: David Lanzendörfer
The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in
designware idmac controller, which is identical to the one found in the mmc-dw
hosts. However the rest of the host is not identical to mmc-dw, it deals with
sending stop commands in hardware which m
Hi,
On 05/12/2014 11:14 AM, Chen-Yu Tsai wrote:
> Hi,
>
> On Sat, May 10, 2014 at 8:56 PM, Maxime Ripard
> wrote:
>> The USB phy controller in the A31 differs mostly from the older controllers
>> because it has a clock dedicated for each phy, while the older ones were
>> having
>> a single cloc
Hi,
On 05/12/2014 01:34 PM, Ulf Hansson wrote:
> On 12 May 2014 13:20, Hans de Goede wrote:
>> Hi,
>>
>> On 05/12/2014 11:15 AM, Ulf Hansson wrote:
>>> On 11 May 2014 09:46, Hans de Goede wrote:
From: David Lanzendörfer
The Allwinner sunxi mmc host uses dma in bus-master mode usi
On 12 May 2014 13:20, Hans de Goede wrote:
> Hi,
>
> On 05/12/2014 11:15 AM, Ulf Hansson wrote:
>> On 11 May 2014 09:46, Hans de Goede wrote:
>>> From: David Lanzendörfer
>>>
>>> The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in
>>> designware idmac controller, which is i
Hi,
On 05/12/2014 09:54 AM, Siarhei Siamashka wrote:
> On Sun, 11 May 2014 22:47:03 +0200
> Hans de Goede wrote:
>
>> So what is your opinion no the 3th patch in this series which drops the
>> DRAM clk on the cubieboard2 to 432 MHz ?
>
> It's all very complicated. We also had a report about
Hi,
On 05/12/2014 11:15 AM, Ulf Hansson wrote:
> On 11 May 2014 09:46, Hans de Goede wrote:
>> From: David Lanzendörfer
>>
>> The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in
>> designware idmac controller, which is identical to the one found in the
>> mmc-dw
>> hosts.
Hi,
I am trying to get hold of the first part of an A10 tablet flash. The tablet
runs and Android 4.0.3 system and when looking into /dev/block I only see nanda
.. nandi and mmcblk0, mmcblk0p1 but mot /dev/nand.
How do I get hold of the bootloader files in such a case?
Thanks for any help
Uli
--
On Mon, 12 May 2014 10:45:44 +0200
Olliver Schinagl wrote:
>
> On 12-05-14 09:54, Siarhei Siamashka wrote:
> > On Sun, 11 May 2014 22:47:03 +0200
> > Hans de Goede wrote:
> >
> >> Hi,
> >>
> >> On 05/11/2014 12:31 PM, Siarhei Siamashka wrote:
> >>> On Sun, 11 May 2014 10:36:25 +0200
> >>> Hans
On 11 May 2014 09:46, Hans de Goede wrote:
> From: David Lanzendörfer
>
> The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in
> designware idmac controller, which is identical to the one found in the mmc-dw
> hosts. However the rest of the host is not identical to mmc-dw, it
Hi,
On Sat, May 10, 2014 at 8:56 PM, Maxime Ripard
wrote:
> The USB phy controller in the A31 differs mostly from the older controllers
> because it has a clock dedicated for each phy, while the older ones were
> having
> a single clock for all the phys.
>
> Signed-off-by: Maxime Ripard
> Revie
The default dcdc3 voltage is only 1.2V after reset on the Cubietruck.
This might be too low for correct DRAM controller operation at high
clock frequencies and even the initialization itself may theoretically
fail. So we initialize AXP first. And only then move on to the DRAM
setup.
Signed-off-by:
Hi,
On Wed, Apr 30, 2014 at 6:54 PM, Александр Берсенев wrote:
> [PATCH v4 01/03] ARM: sunxi: Add documentation for sunxi consumer infrared
> devices
>
> This patch adds documentation for Device-Tree bindings for sunxi IR
> controller.
>
> Signed-off-by: Alexander Bersenev
> Signed-off-by: Alexs
On Sun, 11 May 2014 10:36:24 +0200
Hans de Goede wrote:
> It uses the exact same memory timings as the regular cubieboard, it just
> has lower density dram chips.
>
> get_ram_size will detect that only 512 MB is available on these boards, so
> they will work fine with the regular Cubieboard boar
On 12-05-14 09:54, Siarhei Siamashka wrote:
On Sun, 11 May 2014 22:47:03 +0200
Hans de Goede wrote:
Hi,
On 05/11/2014 12:31 PM, Siarhei Siamashka wrote:
On Sun, 11 May 2014 10:36:25 +0200
Hans de Goede wrote:
We've several bug reports indicating that this causes stability issues,
so lets
Hi,
On Sun, May 11, 2014 at 4:06 PM, Hans de Goede wrote:
> The sun4i resisitive touchscreen controller also comes with a built-in
> temperature sensor. This commit adds support for it.
>
> This commit also introduces a new "ts-attached" device-tree property,
> when this is not set, the input par
On Sun, 11 May 2014 10:36:23 +0200
Hans de Goede wrote:
> I know some people have been working very hard on understanding the dram
> controller better, but until we get some patches as a result of that, this
> seems the best route to take.
I have bought an A13 board a while ago and it is expecte
On Sun, 11 May 2014 22:47:03 +0200
Hans de Goede wrote:
> Hi,
>
> On 05/11/2014 12:31 PM, Siarhei Siamashka wrote:
> > On Sun, 11 May 2014 10:36:25 +0200
> > Hans de Goede wrote:
> >
> >> We've several bug reports indicating that this causes stability issues,
> >> so lets just drop it.
> >
>
Op 12 mei 2014, om 09:19 heeft Hans de Goede het volgende
geschreven:
> Hi,
>
> On 05/12/2014 09:16 AM, Koen Kooi wrote:
>>
>> Op 11 mei 2014, om 22:43 heeft Hans de Goede het
>> volgende geschreven:
>>
>>> Hi,
>>>
>>> On 05/11/2014 11:53 AM, Siarhei Siamashka wrote:
It has been conf
Hi,
On Mon, May 12, 2014 at 3:12 PM, Zoltan HERPAI wrote:
> Hi Hans,
>
> On Mon, 12 May 2014, Hans de Goede wrote:
>
> *snip*
>
>
>>> +Active arm armv7 sunxi - sunxi
>>> pcDuino3 sun7i:PCDUINO3,SPL,SUNXI_EMAC,FAST_MBUS
>>> -
>>
>>
Hi,
On 05/12/2014 09:12 AM, Zoltan HERPAI wrote:
> Hi Hans,
>
> On Mon, 12 May 2014, Hans de Goede wrote:
>
> *snip*
>
>>> +Active arm armv7 sunxi - sunxi
>>> pcDuino3
>>> sun7i:PCDUINO3,SPL,SUNXI_EMAC,FAST_MBUS
Hi,
On 05/12/2014 09:16 AM, Koen Kooi wrote:
>
> Op 11 mei 2014, om 22:43 heeft Hans de Goede het
> volgende geschreven:
>
>> Hi,
>>
>> On 05/11/2014 11:53 AM, Siarhei Siamashka wrote:
>>> It has been confirmed that a substantial percentage of cubieboard2
>>> and cubietruck users are having st
Op 11 mei 2014, om 22:43 heeft Hans de Goede het volgende
geschreven:
> Hi,
>
> On 05/11/2014 11:53 AM, Siarhei Siamashka wrote:
>> It has been confirmed that a substantial percentage of cubieboard2
>> and cubietruck users are having stability issues. These issues are
>> caused by having vario
Hi Hans,
On Mon, 12 May 2014, Hans de Goede wrote:
*snip*
+Active arm armv7 sunxi - sunxi
pcDuino3
sun7i:PCDUINO3,SPL,SUNXI_EMAC,FAST_MBUS
On Mon, 12 May 2014, Hans de Goede wrote:
@@ -19,6 +19,14 @@
compatible = "linksprite,a20-pcduino3", "allwinner,sun7i-a20";
soc@01c0 {
+ mmc0: mmc@01c0f000 {
+ pinctrl-names = "default", "default";
+ pinctrl-0 = <&m
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