Hi,
On Mon, Jun 9, 2014 at 6:59 PM, LABBE Corentin
clabbe.montj...@gmail.com wrote:
Add support for the Security System included in Allwinner SoC A20.
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG algorithms.
Signed-off-by: LABBE
On 06/10/14 08:53, Chen-Yu Tsai wrote:
Hi,
On Mon, Jun 9, 2014 at 6:59 PM, LABBE Corentin
clabbe.montj...@gmail.com wrote:
Add support for the Security System included in Allwinner SoC A20.
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG
Add support for the Security System included in Allwinner SoC A20.
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG algorithms.
Signed-off-by: LABBE Corentin clabbe.montj...@gmail.com
---
drivers/crypto/sunxi-ss/Makefile | 19 ++
Add necessary changes for configuring and compiling the Security System driver.
Signed-off-by: LABBE Corentin clabbe.montj...@gmail.com
---
drivers/crypto/Kconfig | 91 +
drivers/crypto/Makefile | 1 +
2 files changed, 92 insertions(+)
diff
This patch adds documentation for Device-Tree bindings for the Security
System cryptographic accelerator driver.
Signed-off-by: LABBE Corentin clabbe.montj...@gmail.com
---
Documentation/devicetree/bindings/crypto/sunxi-ss.txt | 9 +
1 file changed, 9 insertions(+)
create mode 100644
Hello
This is the driver for the Security System included in Allwinner SoC A20.
The Security System (SS for short) is a hardware cryptographic accelerator that
support AES/MD5/SHA1/DES/3DES/PRNG algorithms.
It could be found on others Allwinner SoC:
- A10s and A31 diagram speak about it with
I have the absolutely same problem:
U-Boot SPL 2014.04-10684-g765936d (Jun 10 2014 - 12:26:32)
Board: Cubieboard
DRAM: 1024 MiB
CPU: 100800Hz, AXI/AHB/APB: 3/2/2
spl: not an uImage at 1600
U-Boot 2014.04-10684-g765936d (Jun 10 2014 - 12:26:32) Allwinner Technology
CPU: Allwinner A10
Hello Mark,
Did you have time to take a look at this patch ?
I'd like to post a new version of this series addressing Lee's comments,
but it would be great to have your feedback on this patch before posting
a new version.
Best Regards,
Boris
On 27/05/2014 11:38, Boris BREZILLON wrote:
PMIC
On Mon, Jun 09, 2014 at 10:26:53AM -0700, Tim Krantz wrote:
On Saturday, May 24, 2014 6:19:45 AM UTC-4, Hans de Goede wrote:
Hi,
On 05/24/2014 05:57 AM, jons...@gmail.com javascript: wrote:
Can anyone verify for me that serial console has ever worked on the
A20 device tree
On Tuesday, June 10, 2014 9:50:05 AM UTC-4, Maxime Ripard wrote:
On Mon, Jun 09, 2014 at 10:26:53AM -0700, Tim Krantz wrote:
On Saturday, May 24, 2014 6:19:45 AM UTC-4, Hans de Goede wrote:
Hi,
On 05/24/2014 05:57 AM, jons...@gmail.com javascript: wrote:
Can
Has any one had any luck getting the 3.15+ dev kernel to boot with a
NFS root? I watched with Wireshark and I can see the DHCP packets but
no NFS traffic.
[2.204211] mmc1: queuing unknown CIS tuple 0x80 (3 bytes)
[2.212608] mmc1: queuing unknown CIS tuple 0x80 (7 bytes)
[2.233433]
dear Jons hope NFS support is built into the kernel. Also ensure that root
filesystem exported
by the server is mountable under normal circumstances.
On Wed, Jun 11, 2014 at 7:45 AM, jonsm...@gmail.com jonsm...@gmail.com
wrote:
Has any one had any luck getting the 3.15+ dev kernel to boot with
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