Hi Emilio,
On Sun, Jul 20, 2014 at 3:41 AM, Emilio López wrote:
> Hi everyone,
>
> Here's this week's update on my GSoC project; if you missed the first issue
> or you want a refresher of what this is about, you can read it on the list
> archives[0]
>
> A couple of days after the last report, and
Dear Ian Campbell,
In message <1405712321-12334-1-git-send-email-...@hellion.org.uk> you wrote:
> In 73545f75b66d "ahci: wait longer for link" I increased the
> timeout to 40ms based on the observed behaviour of a WD disk on a
> Cubietruck. Since then Karsten Merker and myself have both
> observed
Hi everyone,
Here's this week's update on my GSoC project; if you missed the first
issue or you want a refresher of what this is about, you can read it on
the list archives[0]
A couple of days after the last report, and with the help of Jon Smirl,
I got the hardware working on mainline Linux
Hi,
Sorry weekend away, only got phone and a few minutes.
The separate files are separate firmwares from the Android driver. I have no
way currently of know switch is right, so you will need to try each to find the
right one.
Joe
On 19 Jul 2014 09:13, pebr...@gmail.com wrote:
>
> Hi Joe, i ju
Are there any A20 based devices using an AC97 codec chip around?
Emilio and I are working on audio drivers. We have hardware for
everything except the AC97 case.
--
Jon Smirl
jonsm...@gmail.com
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T
On Saturday, July 19, 2014 5:38:11 PM UTC+3, Chen-Yu Tsai wrote:
>
> On Sat, Jul 19, 2014 at 9:06 PM, Jaakko Niemi > wrote:
> > HI,
> >
> > Does anyone have spesific model name/number of the connectors on the
> MicroSD
> > breakout board? To my untrained eye they seem to be 1.27mm 14 pin and
Hi all,
I'm having trouble finding some infos regarding Boot0/Boot1 bootloaders - I
need some GPIO control during boot and I also want to try to change the
part of it which has magic number checking for NAND implemented.
So far I have found only some general things about it on linux-sunxi.org
a
On Sat, Jul 19, 2014 at 9:06 PM, Jaakko Niemi wrote:
> HI,
>
> Does anyone have spesific model name/number of the connectors on the MicroSD
> breakout board? To my untrained eye they seem to be 1.27mm 14 pin and 2.0mm
> 5-pin
> ones, but so far I haven't found any fitting connectors or cables..
D
I had issues with this hardware too... You may need to include cfg80211. (this
is from memory). One of those modules lists that module as a requirement, but
when adding that module as a kernel option it doesn't automatically add that
"requirement". I had to add it manually.
--
You received t
Working with libv on IRC, I found that there are two kernel modules with the
name "nand". If both are selected when compiling the kernel, only one is
included when you "module_install". The issue is that both are included as
modules in the sun7i defconf. The SUNXI_NAND one seems like the usef
HI,
Does anyone have spesific model name/number of the connectors on the MicroSD
breakout board? To my untrained eye they seem to be 1.27mm 14 pin and 2.0mm
5-pin
ones, but so far I haven't found any fitting connectors or cables..
--j
--
You received this
Hi,
On 07/18/2014 09:38 PM, Ian Campbell wrote:
In 73545f75b66d "ahci: wait longer for link" I increased the
timeout to 40ms based on the observed behaviour of a WD disk on a
Cubietruck. Since then Karsten Merker and myself have both
observed timeouts with HGST disks (Karsten on Cubietruck, me o
Hi,
On 07/18/2014 09:38 PM, Ian Campbell wrote:
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
for sun7i only since I don't have access to any other sunxi platforms
with sata included.
The PHY setup is derived from the Alwinner releases and Linux, but is mostly
undocum
Hi,
On 07/18/2014 07:09 PM, Siarhei Siamashka wrote:
This is needed to have feature parity with the normal boot mode,
where the L2EN bit in the CP15 Auxiliary Control Register is set
by the BROM code right from the start.
If this is not done, the Linux system ends up booted with the L2 cache
di
Hi,
On 07/18/2014 07:09 PM, Siarhei Siamashka wrote:
The Allwinner SoCs support a special FEL boot mode, which can be activated
by users via a button press (or other means). In the FEL mode, the BROM
implements a custom FEL protocol over USB, which allows to upload code to
the device and run it.
Hi,
On 07/18/2014 06:22 PM, Siarhei Siamashka wrote:
Hello,
First of all, it may be worth reminding that no accurate documentation
for this particular DRAM controller exists in public access.
However it is suspected that Allwinner uses one of the revisions of
Synopsys DesignWare DDR2/3-Lite Me
Hi Joe, i just received A20 tablet with manufactured code K711_OGS and this tab
using gsl1688 for the touchscreen.. for a week i tried to make your driver
works but always ended up with incomplete xfer 0xf8.
Just yesterday i found out that 3.4.90 kernel has bugs with i2c devices since
they chan
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