Hi
Il 08/set/2014 15:36 "Chen-Yu Tsai" ha scritto:
>
> From: Maxime Ripard
>
> Signed-off-by: Maxime Ripard
> Signed-off-by: Hans de Goede
> [w...@csie.org: commit message was "ARM: sunxi: Setup the A31 UART0
muxing"]
> Signed-off-by: Chen-Yu Tsai
> ---
> arch/arm/cpu/armv7/sunxi/board.c | 4
On Mon, Sep 22, 2014 at 1:02 PM, AndrewDB wrote:
> For what it's worth, I fully support Luc's actions to document Allwinner's
> GPL violations.
>
> I also believe it is in Allwinner's interest to fully comply with the GPL
> and that it's a pity that they don't understand this. How many (extremely
For what it's worth, I fully support Luc's actions to document Allwinner's
GPL violations.
I also believe it is in Allwinner's interest to fully comply with the GPL
and that it's a pity that they don't understand this. How many (extremely
expensive) engineer-hours has this community generously
On Mon, Sep 22, 2014 at 2:44 AM, Ian Campbell wrote:
> On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
>> From: Hans de Goede
>>
>> Signed-off-by: Hans de Goede
>> [w...@csie.org: use setbits_le32 for reset control, drop obsolete changes,
>> squash "sunxi-mmc: sun6i has its
Hi,
On Mon, Sep 22, 2014 at 1:05 AM, Ian Campbell wrote:
> On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
>> From: Oliver Schinagl
>>
>> To setup clocks and control voltages.
>
> perhaps add "... For P2WI and PIO", since that is apparently what it is
> doing?
Sounds good. I'll expand th
On Mon, Sep 22, 2014 at 2:56 AM, Ian Campbell wrote:
> On Sun, 2014-09-21 at 23:42 +0800, Chen-Yu Tsai wrote:
>> FEL mode on the A80 changed the bulk transfer endpoint.
>>
>> Let the fel utility look for the endpoint addresses instead
>> of hard-coding them.
>
> Wow, the library really doesn't go
sön 2014-09-21 klockan 23:42 +0800 skrev Chen-Yu Tsai:
> This is v2 of the A80 SoC FEL mode support series.
Thanks! Series reviewed. applied & pushed.
Regards
Henrik
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On 21 September 2014 19:16, Luc Verhaegen wrote:
> On Sun, Sep 21, 2014 at 04:16:21PM +0200, Paul Kocialkowski wrote:
>> > UART0 with the default pinmux can never lead to a working UART on A13,
>> > as these pins are not available on the A13 package. When the A13 based
>> > device has its accessib
Hi Ian,
On Sun, Sep 21, 2014 at 07:51:17PM +0100, Ian Campbell wrote:
> On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
> > From: Maxime Ripard
> >
> > Add a new sun6i machine that doesn't do much for now.
>
> Can you briefly outline here what it _does_ do, please.
When I contributed th
On Sun, 2014-09-21 at 23:42 +0800, Chen-Yu Tsai wrote:
> FEL mode on the A80 changed the bulk transfer endpoint.
>
> Let the fel utility look for the endpoint addresses instead
> of hard-coding them.
Wow, the library really doesn't go out of its way to make this easy for
you, does it! Thanks for
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
> From: Maxime Ripard
>
> Add a new sun6i machine that doesn't do much for now.
Can you briefly outline here what it _does_ do, please.
The actual code looks ok to me. There is some possibility we might
consolidate some of these Kconfig opt
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
> From: Maxime Ripard
>
> Signed-off-by: Maxime Ripard
> Signed-off-by: Hans de Goede
> [w...@csie.org: commit message was "ARM: sunxi: Setup the A31 UART0 muxing"]
> Signed-off-by: Chen-Yu Tsai
Acked-by: Ian Campbell
--
You received
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
> From: Hans de Goede
>
> Signed-off-by: Hans de Goede
> [w...@csie.org: use setbits_le32 for reset control, drop obsolete changes,
> squash "sunxi-mmc: sun6i has its fifo at a different address"]
> Signed-off-by: Chen-Yu Tsai
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
> +#ifdef CONFIG_SPL_BUILD
Since there is no SPL support this is dead code right now, correct?
I'm wondering whether we should leave it out of mainline until the SPL
stuff is done, so SPL will be upstreamed all at once. What do others
think?
On Sun, Sep 21, 2014 at 04:16:21PM +0200, Paul Kocialkowski wrote:
> > UART0 with the default pinmux can never lead to a working UART on A13,
> > as these pins are not available on the A13 package. When the A13 based
> > device has its accessible UART on UART1, then the UART0 setting does not
> > h
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
> From: Oliver Schinagl
>
> To setup clocks and control voltages.
perhaps add "... For P2WI and PIO", since that is apparently what it is
doing?
> HdG: Rename the files from the somewhat generic pmu name to prcm.{c,h}
> HdG: Make the prcm c
Signed-off-by: Chen-Yu Tsai
---
fel.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fel.c b/fel.c
index 97f265e..c34de19 100644
--- a/fel.c
+++ b/fel.c
@@ -167,6 +167,7 @@ void aw_fel_get_version(libusb_device_handle *usb)
case 0x1633: soc_name="A31";break;
case 0x1651: soc_
FEL mode on the A80 changed the bulk transfer endpoint.
Let the fel utility look for the endpoint addresses instead
of hard-coding them.
Signed-off-by: Chen-Yu Tsai
---
fel.c | 49 +++--
1 file changed, 47 insertions(+), 2 deletions(-)
diff --git a/f
Hi everyone,
This is v2 of the A80 SoC FEL mode support series.
On the A80, the USB endpoint used for bulk transfers was changed.
Previously the endpoint addresses were hard-coded. This has been
changed to be detected just after libusb initialization.
The patches are self explaining. I'll wait a
The Allwinner A80 is a new multi-purpose SoC with 4 Cortex-A7 and
4 Cortex-A15 cores in a big.LITTLE architecture, and a 64-core
PowerVR G6230 GPU.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun9i-a80.dtsi | 280 +++
1 file changed, 280 insertions(+)
c
This adds a list of supported Allwinner SoC bindings.
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/arm/sunxi.txt | 12
1 file changed, 12 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/sunxi.txt
diff --git a/Documentation/devicetree/bin
Hi everyone,
This patch series adds very basic support for Allwinner's A80 SoC,
a big.LITTLE architecture with 4 Cortex-A7s and 4 Cortex-A15s.
Development is done on the A80 Optimus Board, the defacto development
board for the A80, with the accompanying SDK as a reference.
So far I've been unab
The Allwinner A80 is a new Cortex octo-core A7/A15 big.LITTLE SoC.
While it's processor cores and interconnecting bus are new, it
re-uses many peripherals found in earlier Allwinner SoCs.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/mach-sunxi/Kconfig | 5 +
arch/arm/mach-sunxi/sunxi.c | 9 +
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT c
The uarts on sun9i are still compatible with the dw_8250, but are
located at different addresses.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/Kconfig.debug | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b11ad54..58b5218 100644
-
Merrii Technology Co., Ltd. is a Chinese ARM integration developer that
specializes in Allwinner SoC based designs.
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-p
> UART0 with the default pinmux can never lead to a working UART on A13,
> as these pins are not available on the A13 package. When the A13 based
> device has its accessible UART on UART1, then the UART0 setting does not
> hurt, it just does not give you a working early UART, but that does not
> pr
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
> From: Oliver Schinagl
>
> A31 has several new and changed memory address. This patch adds them.
>
> Signed-off-by: Oliver Schinagl
> Signed-off-by: Hans de Goede
> Signed-off-by: Chen-Yu Tsai
Acked-by: Ian Campbell
--
You received
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
> BOOT_TARGET_DEVICES includes USB unconditionally. This breaks when
> CONFIG_CMD_USB is not defined. Use a secondary macro to conditionally
> include it when CONFIG_EHCI is enabled, as we do for CONFIG_AHCI.
>
> Signed-off-by: Chen-Yu Tsai
Hi Luc,
On Sat, Sep 20, 2014 at 12:38 AM, Julian Calaby wrote:
> Hi Luc,
>
> On Sat, Sep 20, 2014 at 12:13 AM, Luc Verhaegen wrote:
>> On Sat, Sep 20, 2014 at 12:04:10AM +1000, Julian Calaby wrote:
>>> Hi Luc,
>>>
>>> The original goal was to have it be part of an online tool that
>>> unskilled
On Sun, Sep 21, 2014 at 8:28 PM, Ian Campbell wrote:
> On Sun, 2014-09-21 at 16:43 +0800, Chen-Yu Tsai wrote:
>> FEL mode on the A80 changed the bulk transfer endpoint.
>> If we use the original binary, it timeouts waiting for
>> bulk transfer to be received, while the FEL BROM hangs
>> waiting to
Looks like a good idea. Could we merge this?
Le jeudi 11 septembre 2014 à 21:38 +0200, Luc Verhaegen a écrit :
> Signed-off-by: Luc Verhaegen
> ---
> arch/arm/configs/sun5i_defconfig |2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/configs/sun5i_defconfig
I would suggest cherry-picking the patch from mainline instead of
pushing this to avoid duplication.
> ---
> include/drm/drm.h |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/include/drm/drm.h b/include/drm/drm.h
> index 64ff02d..33ed74a 100644
> --- a/include/drm/
On Sun, 2014-09-21 at 16:43 +0800, Chen-Yu Tsai wrote:
> FEL mode on the A80 changed the bulk transfer endpoint.
> If we use the original binary, it timeouts waiting for
> bulk transfer to be received, while the FEL BROM hangs
> waiting to send the transfer.
>
> Add a macro and separate build rule
Signed-off-by: Paul Kocialkowski
---
drivers/tty/serial/8250/8250_sunxi.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_sunxi.c
b/drivers/tty/serial/8250/8250_sunxi.c
index 25fdcff..1eb7927 100644
--- a/drivers/tty/seri
For the record, this is required in order to have working NAND on the
Ampe A76 tablet (http://linux-sunxi.org/Ampe_A76). It uses one
H27UCG8T2B 20nm 8G chip.
These changes were imported from the sunxi nand driver version 0x2,
0x12, dated from 20130325. Source code for this version was found
releas
Hi everyone,
This series adds FEL support for the A80 SoC.
On the A80, the USB endpoint used for bulk transfers was changed.
Hence we need to build a separate binary with the correct endpoint
number to use with the A80.
The patches are self explaining. I'll wait a few days before pushing,
in cas
FEL mode on the A80 changed the bulk transfer endpoint.
If we use the original binary, it timeouts waiting for
bulk transfer to be received, while the FEL BROM hangs
waiting to send the transfer.
Add a macro and separate build rule for the A80 specific
version of the fel utility.
Signed-off-by: C
Signed-off-by: Chen-Yu Tsai
---
fel.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fel.c b/fel.c
index 97f265e..c34de19 100644
--- a/fel.c
+++ b/fel.c
@@ -167,6 +167,7 @@ void aw_fel_get_version(libusb_device_handle *usb)
case 0x1633: soc_name="A31";break;
case 0x1651: soc_
Signed-off-by: Paul Kocialkowski
---
drivers/block/sunxi_nand/src/format/nand_format.c | 16 ++---
.../block/sunxi_nand/src/include/nand_drv_cfg.h|4 +-
drivers/block/sunxi_nand/src/include/nand_logic.h |4 +-
drivers/block/sunxi_nand/src/include/nand_physic.h |4 +-
drivers/b
On Sat, Sep 20, 2014 at 5:59 PM, Maxime Ripard
wrote:
> On Wed, Sep 17, 2014 at 12:01:46AM +0800, Chen-Yu Tsai wrote:
>> On Tue, Sep 16, 2014 at 11:48 PM, Maxime Ripard
>> wrote:
>> > On Fri, Sep 12, 2014 at 10:10:25AM +0800, Chen-Yu Tsai wrote:
>> >> On Fri, Sep 12, 2014 at 5:15 AM, Maxime Ripar
On Fri, Sep 19, 2014 at 8:17 PM, Sugar wrote:
> 在 2014/9/12 20:15, Chen-Yu Tsai 写道:
>> On Fri, Sep 12, 2014 at 7:06 PM, Simos Xenitellis
>> wrote:
>>>
>>> On Thu, Sep 11, 2014 at 8:11 PM, Luc Verhaegen wrote:
On Thu, Sep 11, 2014 at 05:22:21PM +0300, Simos Xenitellis wrote:
>
>
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