Re: [linux-sunxi] Re: [PATCH 3/6] mfd: axp20x: Add support for RSB based AXP223 PMIC

2015-10-19 Thread Maxime Ripard
On Fri, Oct 16, 2015 at 02:46:23PM +0800, Chen-Yu Tsai wrote: > On Fri, Oct 16, 2015 at 2:41 PM, Maxime Ripard > wrote: > > On Thu, Oct 15, 2015 at 12:32:19AM +0800, Chen-Yu Tsai wrote: > >> The AXP223 is a new PMIC commonly paired with Allwinner A23/A33 SoCs. >

[linux-sunxi] Suspend-to-ram in mainline kernel

2015-10-19 Thread sufi al hussaini hassani kamili raheemi
Hi, This is with regard to an earlier post on this topic. If I understand right, this will require work on u-boot as well. I see that `suspend` functionality is mentioned on the mainlining effort page

[linux-sunxi] [PATCH v5 3/5] clk: sunxi: pll2: Add A13 support

2015-10-19 Thread Maxime Ripard
The A13, unlike the A10 and A20, doesn't use a pass-through exception for the 0 value in the pre and post dividers, but increments all the values written in the register by one. Add an exception for both these cases to handle them nicely. Signed-off-by: Maxime Ripard

[linux-sunxi] [PATCH v5 4/5] clk: sunxi: codec clock support

2015-10-19 Thread Maxime Ripard
From: Emilio López The codec clock on sun4i, sun5i and sun7i is a simple gate with PLL2 as parent. Add a driver for such a clock. Signed-off-by: Emilio López Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard

[linux-sunxi] [PATCH v5 2/5] clk: sunxi: Add a driver for the PLL2

2015-10-19 Thread Maxime Ripard
The PLL2 on the A10 and later SoCs is the clock used for all the audio related operations. This clock has a somewhat complex output tree, with three outputs (2X, 4X and 8X) with a fixed divider from the base clock, and an output (1X) with a post divider. However, we can simplify things since the

[linux-sunxi] [PATCH v5 5/5] clk: sunxi: mod1 clock support

2015-10-19 Thread Maxime Ripard
From: Emilio López The module 1 type of clocks consist of a gate and a mux and are used on the audio blocks to mux and gate the PLL2 outputs for AC97, IIS or SPDIF. This commit adds support for them on the sunxi clock driver. Signed-off-by: Emilio López

[linux-sunxi] [PATCH v5 1/5] clk: Add a basic multiplier clock

2015-10-19 Thread Maxime Ripard
Some clocks are using a multiplier component, however, unlike their mux, gate or divider counterpart, these factors don't have a basic clock implementation. This leads to code duplication across platforms that want to use that kind of clocks, and the impossibility to use the composite clocks with

[linux-sunxi] [PATCH v5 0/5] clk: sunxi: Add support for the Audio PLL

2015-10-19 Thread Maxime Ripard
Hi, This serie adds support for the PLL2 aka the Audio PLL on the Allwinner A10 and the later SoCs. This is the last part of the audio codec support, it's been around for quite a while now, and I expect it to be merged in 4.4. This serie is built on top of a generic clk-multiplier driver to

[linux-sunxi] Re: [PATCH v2 5/5] ARM: dts: sun6i: Add support for Sinlinx A31s SDK board

2015-10-19 Thread Maxime Ripard
On Fri, Oct 16, 2015 at 03:25:13PM +0800, Chen-Yu Tsai wrote: > On Fri, Oct 16, 2015 at 3:20 PM, Maxime Ripard > wrote: > > Hi, > > > > On Mon, Oct 12, 2015 at 05:42:10PM +0800, Chen-Yu Tsai wrote: > >> On Mon, Oct 12, 2015 at 5:30 PM, Maxime Ripard > >>

Re: [linux-sunxi] Re: [PATCH 3/6] mfd: axp20x: Add support for RSB based AXP223 PMIC

2015-10-19 Thread Chen-Yu Tsai
On Mon, Oct 19, 2015 at 2:02 PM, Maxime Ripard wrote: > On Fri, Oct 16, 2015 at 02:46:23PM +0800, Chen-Yu Tsai wrote: >> On Fri, Oct 16, 2015 at 2:41 PM, Maxime Ripard >> wrote: >> > On Thu, Oct 15, 2015 at 12:32:19AM +0800,

[linux-sunxi] Re: [PATCH v5 1/5] clk: Add a basic multiplier clock

2015-10-19 Thread Chen-Yu Tsai
On Mon, Oct 19, 2015 at 4:08 PM, Maxime Ripard wrote: > Some clocks are using a multiplier component, however, unlike their mux, > gate or divider counterpart, these factors don't have a basic clock > implementation. > > This leads to code duplication across

[linux-sunxi] Re: [PATCH v3 00/12] pwm: add support for atomic update

2015-10-19 Thread Heiko Stübner
Hi Thierry, Am Montag, 21. September 2015, 11:33:17 schrieb Boris Brezillon: > Hello, > > This series adds support for atomic PWM update, or IOW, the capability > to update all the parameters of a PWM device (enabled/disabled, period, > duty and polarity) in one go. is anything more blocking

Re: [linux-sunxi] [PATCH v2 1/1] dts: sun6i: yones toptech bs1078 v2: Add AXP221 support to dts

2015-10-19 Thread Chen-Yu Tsai
On Mon, Oct 19, 2015 at 2:07 AM, Lawrence Yu wrote: > Enable the axp221 PMIC chip in the dts file. > > Allows board to power off correctly from the poweroff command > > This board requires dc1sw to be enabled in order to provide a power source > for the 5V DCDC converter that

Re: [linux-sunxi] Re: [PATCH 3/6] mfd: axp20x: Add support for RSB based AXP223 PMIC

2015-10-19 Thread Maxime Ripard
On Mon, Oct 19, 2015 at 02:20:29PM +0800, Chen-Yu Tsai wrote: > On Mon, Oct 19, 2015 at 2:02 PM, Maxime Ripard > wrote: > > On Fri, Oct 16, 2015 at 02:46:23PM +0800, Chen-Yu Tsai wrote: > >> On Fri, Oct 16, 2015 at 2:41 PM, Maxime Ripard > >>

Re: [linux-sunxi] Re: [PATCH] ARM: dts: sun4i: Add dts file for the pov protab2-ips9 tablet

2015-10-19 Thread Maxime Ripard
On Tue, Sep 22, 2015 at 05:24:37PM +0200, Hans de Goede wrote: > Hi, > > On 22-09-15 17:02, Maxime Ripard wrote: > >On Sun, Sep 13, 2015 at 07:33:36PM +0200, Hans de Goede wrote: > >>>Anyway. In both cases, the regulator really shouldn't be drifting > >>>along like this. > >> > >>Right which is

[linux-sunxi] Re: [PATCH] ARM: dts: sun7i: Enable USB DRC on pcDuino v3 Nano

2015-10-19 Thread Maxime Ripard
On Sat, Oct 17, 2015 at 11:08:29PM +0100, Adam Sampson wrote: > The OTG arrangement on the LinkSprite pcDuino v3 Nano is the same as the > pcDuino 1/2/3: the OTG port's 5V line is connected directly to the 5V > bus (it's not switchable), and the OTG port's ID pin is connected to PH4 > on the A20.

Re: [linux-sunxi] Re: [PATCH 3/6] mfd: axp20x: Add support for RSB based AXP223 PMIC

2015-10-19 Thread Chen-Yu Tsai
On Tue, Oct 20, 2015 at 2:48 AM, Maxime Ripard wrote: > On Mon, Oct 19, 2015 at 02:20:29PM +0800, Chen-Yu Tsai wrote: >> On Mon, Oct 19, 2015 at 2:02 PM, Maxime Ripard >> wrote: >> > On Fri, Oct 16, 2015 at 02:46:23PM +0800,