[linux-sunxi] Re: sunxi fosdem dinner

On Tue, Jan 26, 2016 at 4:31 PM, Benjamin Henrion wrote: > On Fri, Jan 8, 2016 at 1:45 PM, Benjamin Henrion wrote: >> Hi, >> >> Sorry for being late, I will rebook the same restaurant as previous >> years (Amadeo [1]) as I could not find other places with

[linux-sunxi] [PATCH 01/14] pinctrl: sunxi: Add A83T R_PIO controller support

The A83T has R_PIO pin controller, it's same as A23, execpt A83T interrupt bit is 6th and A83T has one extra pin PL12. Signed-off-by: Vishnu Patekar --- .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + drivers/pinctrl/sunxi/Kconfig |

[linux-sunxi] [PATCH 00/14] Add A83T clk, r_pio, mmc rsb support

Hello, This series adds further support for A83T, mainly adds clock support. Also adds R_PIO, PRCM related clocks, mmc, rsb support. A83T difference in short: R_PIO is slightly different from A23 r_pio. AHB1 has different parents as compared to a31-ahb1, APB1 has different dividers.Bus gates are

[linux-sunxi] [PATCH 04/14] clk: sunxi: add ahb1 clock for A83T

AHB1 on A83T is similar to ahb1 on A31, except parents are different. clock index 0b1x is PLL6. Signed-off-by: Vishnu Patekar --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c | 75 +++

[linux-sunxi] [PATCH 07/14] ARM: dts: sun8i-a83t: Add basic clocks and resets

This adds A83T system bus clocks, bus gates, and clock resets. For ahb1 and ahb2, it's not clear which reset belongs to ahb1 or ahb2; so named as ahb_reset0, ahb_reset1, ahb_reset2. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 127

[linux-sunxi] [PATCH 03/14] clk: sunxi: add bus gates for A83T

A83T has similar bus gates that of H3, including single gating register has different clock parent. As per H3 and A83T datasheet, usbhost is under AHB2. However,below shows allwinner source code assignment: bits: 26 (ehci0), 27 (ehci1), 29 (ohci0) => AHB1 for A83T. bits: 26 (ehci0), 27 (ehci1)

[linux-sunxi] [PATCH 12/14] ARM: dts: sun8i-a83t: Add RSB nodes to dtsi

This adds support for RSB A83T RSB is compatible with A23 rsb. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi

[linux-sunxi] [PATCH 11/14] ARM: dts: sun8i-a83t: Add R_PIO controller node to the dtsi

Now that we have a driver for the R_PIO controller, add the corresponding device node to the dtsi. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 21 + 1 file changed, 21 insertions(+) diff --git

[linux-sunxi] [PATCH 09/14] ARM: dts: sun8i-a83t: Add mmc controller nodes

A83T mmc is compatible with earliers sunxi socs. This adds mmc0, mmc1, and mmc2 controller nodes for A83T. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++ 1 file changed, 57 insertions(+) diff --git

[linux-sunxi] [PATCH 02/14] clk: sunxi: Add apb0 gates for A83T

APB0 is part of PRCM, and is compatible with earlier SOCs. apb0 gates controls R_PIO, R_UART, R_RSB, etc clocks. This patch adds support for APB0 gates for A83T. Signed-off-by: Vishnu Patekar --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 +

[linux-sunxi] [PATCH 06/14] ARM: dts: sun8i-a83t: Correct low speed oscillator clocks

From: Chen-Yu Tsai The A83T does not have a 32.768 kHz low speed oscillator, either as an external crystal or input. It has a 16 MHz RC-based (inaccurate) internal oscillator, which is then divided by 512 for a clock close to 32 kHz. Signed-off-by: Chen-Yu Tsai

[linux-sunxi] [PATCH 14/14] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

This patch adds support for Sinovoip BPI-M3 A83T based board. It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar ---

[linux-sunxi] [PATCH 13/14] ARM: dts: sun8i: enable mmc for H8Homlet Board.

This enables mmc0. Signed-off-by: Vishnu Patekar Tested-by: LABBE Corentin --- .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts| 20 1 file changed, 20 insertions(+) diff --git

[linux-sunxi] [PATCH 08/14] ARM: dts: sun8i-a83t: add mmc clock nodes

mmc clocks are compatible with that of earlier sun8i socs. This adds mmc0, mmc1, and mmc2 clock nodes for A83T. Signed-off-by: Vishnu Patekar --- arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++ 1 file changed, 30 insertions(+) diff --git

[linux-sunxi] Re: [PATCH 01/14] pinctrl: sunxi: Add A83T R_PIO controller support

Hi, On Sun, Jan 31, 2016 at 9:20 AM, Vishnu Patekar wrote: > The A83T has R_PIO pin controller, it's same as A23, execpt A83T > interrupt bit is 6th and A83T has one extra pin PL12. > > Signed-off-by: Vishnu Patekar > --- >

[linux-sunxi] Re: [PATCH 12/14] ARM: dts: sun8i-a83t: Add RSB nodes to dtsi

Hi, On Sun, Jan 31, 2016 at 9:21 AM, Vishnu Patekar wrote: > This adds support for RSB > A83T RSB is compatible with A23 rsb. > > Signed-off-by: Vishnu Patekar > --- > arch/arm/boot/dts/sun8i-a83t.dtsi | 14 ++ > 1 file

[linux-sunxi] Re: [PATCH 05/14] clk: sunxi: Add APB1 clock for A83T

On Sun, Jan 31, 2016 at 9:20 AM, Vishnu Patekar wrote: > APB1 is similar to sun4i-a10-apb0-clk, except different dividers. > > This adds support for apb1 on A83T. > > Signed-off-by: Vishnu Patekar > --- >

[linux-sunxi] Re: [PATCH 11/14] ARM: dts: sun8i-a83t: Add R_PIO controller node to the dtsi

On Sun, Jan 31, 2016 at 9:21 AM, Vishnu Patekar wrote: > Now that we have a driver for the R_PIO controller, > add the corresponding device node to the dtsi. > > Signed-off-by: Vishnu Patekar > --- > arch/arm/boot/dts/sun8i-a83t.dtsi |

[linux-sunxi] Re: [PATCH 07/14] ARM: dts: sun8i-a83t: Add basic clocks and resets

On Sun, Jan 31, 2016 at 9:20 AM, Vishnu Patekar wrote: > This adds A83T system bus clocks, bus gates, and clock resets. > > For ahb1 and ahb2, it's not clear which reset belongs to ahb1 > or ahb2; so named as ahb_reset0, ahb_reset1, ahb_reset2. > > Signed-off-by:

[linux-sunxi] Re: [PATCH 08/14] ARM: dts: sun8i-a83t: add mmc clock nodes

On Sun, Jan 31, 2016 at 9:21 AM, Vishnu Patekar wrote: > mmc clocks are compatible with that of earlier sun8i socs. > This adds mmc0, mmc1, and mmc2 clock nodes for A83T. > > Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai