[linux-sunxi] Re: [PATCH 08/11] clk: sunxi: improve error reporting for the mux clock

On Mon, Feb 01, 2016 at 05:39:27PM +, Andre Przywara wrote: > clk_register_mux returns a pointer wrapped error value in case of > failure, so a simple NULL check is not sufficient to catch errors. > Fix that and elaborate on the failure reason on the way. The whole > function does not return

[linux-sunxi] Re: [PATCH v3 0/2] Add SPDIF support for Allwinner SoCs

On Tue, Feb 02, 2016 at 03:49:52PM +0100, codekip...@gmail.com wrote: > Marcus Cooper (2): > dt-bindings: add sun4i SPDIF transceiver bindings > ASOC: sunxi: Add support for the SPDIF block Please do try to use subject lines matching the style for the subsystem. -- You received this

[linux-sunxi] Re: [PATCH 08/11] clk: sunxi: improve error reporting for the mux clock

Salut, On 02/02/16 18:02, Maxime Ripard wrote: > On Mon, Feb 01, 2016 at 05:39:27PM +, Andre Przywara wrote: >> clk_register_mux returns a pointer wrapped error value in case of >> failure, so a simple NULL check is not sufficient to catch errors. >> Fix that and elaborate on the failure

[linux-sunxi] [PATCH v2 0/5] pinctrl: sunxi: Add H3 R_PIO controller support

This patch series is extension of my original single patch with the same subject. It adds support for R_PIO so that GPIO port L can be used in H3 based devices. It was tested on OrangePi PC where PL is connected amount others to an onboard led, a switch and IR receiver and some VCC controllers.

[linux-sunxi] [PATCH v2 3/5] pinctrl: sunxi: Add H3 R_PIO controller support

H3 has additional PIO controller similar to what we can find on A23. It's a 12 pin port, described in H3 Datasheet rev 1.1, pages 345-350. Signed-off-by: Krzysztof Adamski --- drivers/pinctrl/sunxi/Kconfig | 4 ++ drivers/pinctrl/sunxi/Makefile | 1 +

[linux-sunxi] Re: [PATCH v3 2/2] ASOC: sunxi: Add support for the SPDIF block

Hi, It looks mostly good on my side, a few comments though. On Tue, Feb 02, 2016 at 03:49:54PM +0100, codekip...@gmail.com wrote: > +#ifdef CONFIG_PM > +static int sun4i_spdif_runtime_suspend(struct device *dev) > +{ > + struct sun4i_spdif_dev *host = dev_get_drvdata(dev); > + > +

[linux-sunxi] [PATCH v2 2/5] dts: sun8i-h3: Add APB0 related clocks and resets

APB0 is bearly mentioned in H3 User Manual and it is only setup in the Allwinners kernel dump for CIR. I have verified experimentally that the gate for R_PIO exists and works, though. There are probably other gates there but I don't know their order right now and I don't have access to their

[linux-sunxi] [PATCH v2 1/5] clk: sunxi: Add apb0 gates for H3

This patch adds support for APB0 in H3. It seems to be compatible with earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR, etc). Signed-off-by: Krzysztof Adamski --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-simple-gates.c

[linux-sunxi] [PATCH v2 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi

Add the corresponding device node for R_PIO on H3 to the dtsi. Support for the controller was added in earlier commit. Signed-off-by: Krzysztof Adamski --- .../devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + arch/arm/boot/dts/sun8i-h3.dtsi

[linux-sunxi] [PATCH v2 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set

sunxi_pmx_set accepts pin number and then calculates offset by subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand, gets offset so we have to convert it to pin number so we won't get negative value in sunxi_pmx_set. This was only used on A10 so far, where there is only one

Re: [linux-sunxi] [PATCH v2 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi

Hi Krzysztof, On Wed, Feb 3, 2016 at 8:21 AM, Krzysztof Adamski wrote: > Add the corresponding device node for R_PIO on H3 to the dtsi. Support > for the controller was added in earlier commit. > > Signed-off-by: Krzysztof Adamski > --- >

[linux-sunxi] Re: [PATCH 02/11] mfd: axp20x: Add bindings for AXP809 PMIC

On Tue, Feb 02, 2016 at 06:27:35PM +0800, Chen-Yu Tsai wrote: > This patch adds the basic and regulator bindings for the X-Powers AXP809 > PMIC. > > Also update the DC-DC converter operating frequency for AXP22X/AXP80X. > > Signed-off-by: Chen-Yu Tsai > --- >

[linux-sunxi] Re: [PATCH v3 1/2] dt-bindings: add sun4i SPDIF transceiver bindings

Hi, On Tue, Feb 02, 2016 at 03:49:53PM +0100, codekip...@gmail.com wrote: > From: Marcus Cooper > > Add devicetree bindings for the SPDIF transceiver found on > found on Allwinners A10 and A20 SoCs. > > Signed-off-by: Marcus Cooper > --- >

Re: [linux-sunxi] [PATCH 01/11] MAINTAINERS: Add entry for X-Powers AXP family PMIC drivers

Hi Chen-Yu, On Tue, Feb 2, 2016 at 9:27 PM, Chen-Yu Tsai wrote: > Add an entry for X-Powers AXP family PMIC drivers and list myself > as maintainer. > > Cc: Carlo Caione > Cc: Maxime Ripard > Cc: Ramakrishna Pallala

Re: [linux-sunxi] [PATCH 01/11] MAINTAINERS: Add entry for X-Powers AXP family PMIC drivers

On Wed, 2016-02-03 at 11:19 +1100, Julian Calaby wrote: > On Tue, Feb 2, 2016 at 9:27 PM, Chen-Yu Tsai wrote: > > Add an entry for X-Powers AXP family PMIC drivers and list myself > > as maintainer. [] > > diff --git a/MAINTAINERS b/MAINTAINERS [] > > @@ -11941,6 +11941,12 @@ F:

Re: [linux-sunxi] [PATCH 01/11] MAINTAINERS: Add entry for X-Powers AXP family PMIC drivers

Hi Joe, On Wed, Feb 3, 2016 at 12:28 PM, Joe Perches wrote: > On Wed, 2016-02-03 at 11:19 +1100, Julian Calaby wrote: >> On Tue, Feb 2, 2016 at 9:27 PM, Chen-Yu Tsai wrote: >> > Add an entry for X-Powers AXP family PMIC drivers and list myself >> > as

[linux-sunxi] [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux

It seems that on H3, just like on A10, when GPIOs are configured as external interrupt data registers does not contain their value. When value is read, GPIO function must be temporary switched to input for reads. Signed-off-by: Krzysztof Adamski --- Changes compared to v1: -

[linux-sunxi] Re: [PATCH 00/11] arm64: Introduce Allwinner A64 and Pine64 support

On 02/02/16 07:57, lists.nick.betteri...@gmail.com wrote: > Just a quick question - will there be any support for enabling booting into > virtualisation mode to run xen and the like? This is a firmware issue. The SoC itself provides everything you need and even Allwinner choosing ARM Trusted

Re: [linux-sunxi] [PATCH 02/11] crypto: sunxi-ss: prevent compilation on 64-bit

On Mon, Feb 01, 2016 at 05:39:21PM +, Andre Przywara wrote: > The driver for the sunxi-ss crypto engine is not entirely 64-bit safe, > compilation on arm64 spits some warnings. > The proper fix was deemed to involved [1], so since 64-bit SoCs won't > have this IP block we just disable this

[linux-sunxi] [PATCH v3 2/2] ASOC: sunxi: Add support for the SPDIF block

From: Marcus Cooper The sun4i, sun5i and sun7i SoC families have an SPDIF block which is capable of playback and capture. This patch enables the playback of this block for the sun4i families. Signed-off-by: Marcus Cooper --- sound/soc/sunxi/Kconfig

[linux-sunxi] [PATCH v3 1/2] dt-bindings: add sun4i SPDIF transceiver bindings

From: Marcus Cooper Add devicetree bindings for the SPDIF transceiver found on found on Allwinners A10 and A20 SoCs. Signed-off-by: Marcus Cooper --- .../devicetree/bindings/sound/sun4i,spdif.txt | 46 ++ 1 file changed, 46

[linux-sunxi] Re: [PATCH RFC 10/11] clk: sunxi: rewrite sun6i-ar100 using factors clk

On Mon, Jan 25, 2016 at 8:15 AM, Chen-Yu Tsai wrote: > sun6i's AR100 clock is a classic factors clk case: > > AR100 = ((parent mux) >> p) / (m + 1) > > Signed-off-by: Chen-Yu Tsai This patch adds a ".remove" function to a driver that is controlled by a bool

Re: [linux-sunxi] Re: [PATCH 05/11] drivers: pinctrl: add driver for Allwinner A64 SoC

Hi, On 02/02/16 01:58, Siarhei Siamashka wrote: > On Mon, 1 Feb 2016 22:49:16 + > André Przywara wrote: > >> On 01/02/16 18:27, Karsten Merker wrote: >> >> Hi Karsten, >> >> thank you very much for your feedback! >> >>> On Mon, Feb 01, 2016 at 05:39:24PM +, Andre

[linux-sunxi] Re: [PATCH 00/11] arm64: Introduce Allwinner A64 and Pine64 support

Just a quick question - will there be any support for enabling booting into virtualisation mode to run xen and the like? Cheers Nick -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from

[linux-sunxi] [PATCH v3 0/2] Add SPDIF support for Allwinner SoCs

From: Marcus Cooper This patch set adds support for the Allwinner SPDIF transceiver. For now just the SPDIF transmitter has been tested on a Mele A2000(A10) and a Itead Ibox(A20). In order for this patch set to be functional we require an audio clock patch which will be

[linux-sunxi] donate boards to kernelci

Hi, We have some 40EUR left too much from the sunxi dinner, it was decided to buy a Pine64 and donate it for the kernelci lab. There is also a need to have an H3 board on there, I have a second Orangepi PC that I will donate as well. If you have contacts with manufacturers (Olimex, Orangepi,

[linux-sunxi] Re: [PATCH 03/11] drivers: rtc: allow compilation of sun6i RTC for all sunxi SoCs

On Mon, Feb 01, 2016 at 05:39:22PM +, Andre Przywara wrote: > At the moment the "sun6i" RTC drivers depends on having two specific > SoC families selected. > The Allwinner A64 SoC has the same RTC, so extend the Kconfig option > to allow inclusion of the driver for all Allwinner SoCs. > >

[linux-sunxi] Re: [PATCH 05/11] drivers: pinctrl: add driver for Allwinner A64 SoC

On Tue, Feb 2, 2016 at 6:00 PM, Maxime Ripard wrote: > Hi Andre, > > On Mon, Feb 01, 2016 at 10:49:16PM +, André Przywara wrote: >> On 01/02/16 18:27, Karsten Merker wrote: >> >> Hi Karsten, >> >> thank you very much for your feedback! >> >> > On Mon, Feb 01,

[linux-sunxi] [PATCH 10/11] ARM: dts: sun9i: a80-optimus: Disable dummy regulators vcc3v0, vcc3v3, vcc5v0

These 3 regulators are provided in sunxi-common-regulators.dtsi. 3.0V/3.3V and 5.0V are commonly used voltages in Allwinner devices. These dummy regulators provide a stand-in when bindings that require one, but the real regulator is not supported yet. Since these are no longer needed, we can

[linux-sunxi] [PATCH 02/11] mfd: axp20x: Add bindings for AXP809 PMIC

This patch adds the basic and regulator bindings for the X-Powers AXP809 PMIC. Also update the DC-DC converter operating frequency for AXP22X/AXP80X. Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/mfd/axp20x.txt | 31 ++-- 1 file changed,

[linux-sunxi] [PATCH 03/11] mfd: axp20x: Add support for AXP809 PMIC

The X-Powers AXP809 is a new PMIC that is paired with Allwinner's A80 SoC, along with a slave AXP806 PMIC. This PMIC is quite similar to the earlier AXP223, though the interrupts and regulator have changed a bit. This patch adds support for the interrupts and power button of the PMIC.

[linux-sunxi] [PATCH 08/11] ARM: dts: sun9i: a80-optimus: Add AXP809 PMIC device node and regulators

The AXP809 PMIC is the primary PMIC. It provides various supply voltages for the SoC and other peripherals. The PMIC's interrupt line is connected to NMI pin of the SoC. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun9i-a80-optimus.dts | 121 +++-

[linux-sunxi] [PATCH 01/11] MAINTAINERS: Add entry for X-Powers AXP family PMIC drivers

Add an entry for X-Powers AXP family PMIC drivers and list myself as maintainer. Cc: Carlo Caione Cc: Maxime Ripard Cc: Ramakrishna Pallala Cc: Todd Brandt Cc: Jacob Pan

[linux-sunxi] [PATCH 04/11] regulator: axp20x: Remove voltage readout support for switch regulators

Switch-type regulators, such as DC1SW on AXP22X, are a secondary output from DCDC1. They are just an on/off switch, and the driver should not try to read its voltage directly from the DCDC1 control registers. Instead, the core will pass down the voltage from the regulator supply chain.

[linux-sunxi] [PATCH 05/11] regulator: axp20x: Use linear voltage ranges for AXP20X LDO4

AXP20X datasheet lists the possible voltage settings for LDO4, so it was implemented using a voltage table. Upon closer examination, the valid voltages can be mapped into 3 linear ranges. Move AXP20X LDO4 to use linear ranges. The supporting code can be reused with later AXP8xx PMICs, which have

[linux-sunxi] [PATCH 11/11] ARM: dts: sun9i: cubieboard4: Disable dummy regulators vcc3v0, vcc3v3, vcc5v0

These 3 regulators are provided in sunxi-common-regulators.dtsi. 3.0V/3.3V and 5.0V are commonly used voltages in Allwinner devices. These dummy regulators provide a stand-in when bindings that require one, but the real regulator is not supported yet. Since these are no longer needed, we can

[linux-sunxi] [PATCH 00/11] mfd: axp20x: Add support for AXP809 PMIC

Hi everyone, This series adds support for X-Powers' AXP809 PMIC. This is the primary PMIC accompanying Allwinner's A80 SoC. For now, only the power button (PEK) and regulators are supported. These are supported using existing axp20x drivers. This is based on the AXP223 series v7. Patch 1 adds a

[linux-sunxi] [PATCH 07/11] ARM: dts: sunxi: Add dtsi file for AXP809 PMIC

The AXP809 PMIC is used with the Allwinner A80 SoC, along with an AXP806 PMIC as a slave. This patch adds a dtsi file for all the common bindings and default values unrelated to board design. Currently this is just listing all the regulator nodes. The regulators are initialized based on their

[linux-sunxi] [PATCH 06/11] regulator: axp20x: support AXP809 variant

The X-Powers AXP809 PMIC has a similar set of regulators as the AXP221, though a few LDOs were removed, and a new switch output added. Like the AXP221, AXP809 also has DC1SW and DC5LDO, which are internally chained to DCDC1 and DCDC5, respectively. Add support for this new variant. Also remove

[linux-sunxi] Re: [PATCH 05/11] drivers: pinctrl: add driver for Allwinner A64 SoC

Hi Andre, On Mon, Feb 01, 2016 at 10:49:16PM +, André Przywara wrote: > On 01/02/16 18:27, Karsten Merker wrote: > > Hi Karsten, > > thank you very much for your feedback! > > > On Mon, Feb 01, 2016 at 05:39:24PM +, Andre Przywara wrote: > >> Based on the Allwinner A64 user manual and

[linux-sunxi] [PATCH 09/11] ARM: dts: sun9i: cubieboard4: Add AXP809 PMIC device node and regulators

The AXP809 PMIC is the primary PMIC. It provides various supply voltages for the SoC and other peripherals. The PMIC's interrupt line is connected to NMI pin of the SoC. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 121 +++-

[linux-sunxi] Re: [PATCH 04/11] arm64: Introduce Allwinner SoC config option

On Tuesday 02 February 2016 15:30:48 Andre Przywara wrote: > Hi, > > On 02/02/16 15:20, Matthias Brugger wrote: > > > > > > On 01/02/16 18:39, Andre Przywara wrote: > >> To prepare for the Allwinner A64 SoC support, introduce a config > >> option to allow compiling Allwinner (aka. sunxi)

[linux-sunxi] Re: [PATCH 10/11] ARM: dts: sun9i: a80-optimus: Disable dummy regulators vcc3v0, vcc3v3, vcc5v0

Hi, On Tue, Feb 02, 2016 at 06:27:43PM +0800, Chen-Yu Tsai wrote: > These 3 regulators are provided in sunxi-common-regulators.dtsi. > 3.0V/3.3V and 5.0V are commonly used voltages in Allwinner devices. > These dummy regulators provide a stand-in when bindings that require > one, but the real

Re: [linux-sunxi] [PATCH 10/11] arm64: dts: add Allwinner A64 SoC .dtsi

Hi Jens, thanks for having such an elaborate look! On 02/02/16 16:24, Jens Kuske wrote: > Hi, > > On 01/02/16 18:39, Andre Przywara wrote: >> The Allwinner A64 SoC is low-cost SoC with 4 ARM Cortex-A53 cores >> and the typical tablet / TV box peripherals. >> The Soc is based on the (32-bit)

[linux-sunxi] Re: [PATCH 01/11] irqchip: sun4i: fix compilation outside of arch/arm

On 02/02/16 16:32, Andre Przywara wrote: Hi, On 02/02/16 15:12, Matthias Brugger wrote: On 01/02/16 18:39, Andre Przywara wrote: The Allwinner sunxi specific interrupt controller cannot be compiled for any architecture except arm: s/arm/arm64 ??? As it stands it only compiles for arm,

[linux-sunxi] Re: [PATCH 01/11] irqchip: sun4i: fix compilation outside of arch/arm

On 01/02/16 18:39, Andre Przywara wrote: The Allwinner sunxi specific interrupt controller cannot be compiled for any architecture except arm: s/arm/arm64 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop

[linux-sunxi] Re: [PATCH 01/11] irqchip: sun4i: fix compilation outside of arch/arm

Hi, On 02/02/16 15:12, Matthias Brugger wrote: > On 01/02/16 18:39, Andre Przywara wrote: >> The Allwinner sunxi specific interrupt controller cannot be compiled >> for any architecture except arm: > > s/arm/arm64 ??? As it stands it only compiles for arm, and not arm64, so "cannot be compile

[linux-sunxi] Re: [PATCH 04/11] arm64: Introduce Allwinner SoC config option

On 01/02/16 18:39, Andre Przywara wrote: To prepare for the Allwinner A64 SoC support, introduce a config option to allow compiling Allwinner (aka. sunxi) specific drivers for the arm64 architecture as well. This patch just defines the ARCH_SUNXI symbol to allow Allwinner specific drivers to

[linux-sunxi] Re: [PATCH] pinctrl: sunxi: Add H3 R_PIO controller support

On Tue, Feb 02, 2016 at 10:24:51AM +0100, Krzysztof Adamski wrote: On Tue, Feb 02, 2016 at 02:25:18PM +0800, Chen-Yu Tsai wrote: On Mon, Feb 1, 2016 at 6:12 PM, Krzysztof Adamski wrote: - reg: Should contain the register physical address and length for the diff --git

[linux-sunxi] Re: [PATCH 07/11] ARM: dts: sunxi: Add dtsi file for AXP809 PMIC

On Tue, Feb 02, 2016 at 06:27:40PM +0800, Chen-Yu Tsai wrote: > + reg_dcdc1: dcdc1 { > + regulator-name = "dcdc1"; > + }; Why is this generic DTS include specifying regulator names? > + reg_rtc_ldo: rtc_ldo { > + /*

[linux-sunxi] Re: [PATCH 04/14] clk: sunxi: add ahb1 clock for A83T

Hi, On Sun, Jan 31, 2016 at 09:20:56AM +0800, Vishnu Patekar wrote: > AHB1 on A83T is similar to ahb1 on A31, except parents are different. > clock index 0b1x is PLL6. > > Signed-off-by: Vishnu Patekar If the clock is the same but the parents are different, then we

[linux-sunxi] Re: [PATCH 06/14] ARM: dts: sun8i-a83t: Correct low speed oscillator clocks

On Sun, Jan 31, 2016 at 09:20:58AM +0800, Vishnu Patekar wrote: > From: Chen-Yu Tsai > > The A83T does not have a 32.768 kHz low speed oscillator, either as > an external crystal or input. It has a 16 MHz RC-based (inaccurate) > internal oscillator, which is then divided by 512

[linux-sunxi] Re: [PATCH 06/14] ARM: dts: sun8i-a83t: Correct low speed oscillator clocks

1;4002;0c On Sun, Jan 31, 2016 at 09:20:58AM +0800, Vishnu Patekar wrote: > From: Chen-Yu Tsai > > The A83T does not have a 32.768 kHz low speed oscillator, either as > an external crystal or input. It has a 16 MHz RC-based (inaccurate) > internal oscillator, which is then divided

[linux-sunxi] Re: [PATCH 01/11] MAINTAINERS: Add entry for X-Powers AXP family PMIC drivers

On Tue, Feb 02, 2016 at 06:27:34PM +0800, Chen-Yu Tsai wrote: > Add an entry for X-Powers AXP family PMIC drivers and list myself > as maintainer. > > Cc: Carlo Caione > Cc: Maxime Ripard > Cc: Ramakrishna Pallala

Re: [linux-sunxi] [PATCH 10/11] arm64: dts: add Allwinner A64 SoC .dtsi

Hi, On 01/02/16 18:39, Andre Przywara wrote: > The Allwinner A64 SoC is low-cost SoC with 4 ARM Cortex-A53 cores > and the typical tablet / TV box peripherals. > The Soc is based on the (32-bit) Allwinner H3 chip, sharing most of > the peripherals and the memory map. > Although the cores are

[linux-sunxi] Re: [PATCH 10/11] ARM: dts: sun9i: a80-optimus: Disable dummy regulators vcc3v0, vcc3v3, vcc5v0

On Wed, Feb 3, 2016 at 12:21 AM, Maxime Ripard wrote: > Hi, > > On Tue, Feb 02, 2016 at 06:27:43PM +0800, Chen-Yu Tsai wrote: >> These 3 regulators are provided in sunxi-common-regulators.dtsi. >> 3.0V/3.3V and 5.0V are commonly used voltages in Allwinner

[linux-sunxi] [PATCH] ASOC: sunxi: fix platform_no_drv_owner.cocci warnings

sound/soc/sunxi/sun4i-spdif.c:572:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci CC: Marcus Cooper Signed-off-by: Fengguang Wu

[linux-sunxi] Re: [PATCH v3 2/2] ASOC: sunxi: Add support for the SPDIF block

-for-Allwinner-SoCs/20160202-225229 base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next coccinelle warnings: (new ones prefixed by >>) >> sound/soc/sunxi/sun4i-spdif.c:572:3-8: No need to set .owner here. The core >> will do it. Please review

Re: [linux-sunxi] Re: [PATCH 05/11] drivers: pinctrl: add driver for Allwinner A64 SoC

Hi, On Tue, Feb 02, 2016 at 03:58:52AM +0200, Siarhei Siamashka wrote: > > > On Mon, Feb 01, 2016 at 05:39:24PM +, Andre Przywara wrote: > > >> Based on the Allwinner A64 user manual and on the previous sunxi > > >> pinctrl drivers this introduces the pin multiplex assignments for > > >>

Re: [linux-sunxi] [PATCH 10/11] arm64: dts: add Allwinner A64 SoC .dtsi

Hi, On 02/02/16 17:46, Andre Przywara wrote: > Hi Jens, > > thanks for having such an elaborate look! > > On 02/02/16 16:24, Jens Kuske wrote: >> Hi, >> >> On 01/02/16 18:39, Andre Przywara wrote: [..] >>> + >>> + /* dummy clock until pll6 can be reused */ >>> + pll8:

Re: [linux-sunxi] [PATCH 01/11] MAINTAINERS: Add entry for X-Powers AXP family PMIC drivers

On Wed, Feb 3, 2016 at 9:28 AM, Joe Perches wrote: > On Wed, 2016-02-03 at 11:19 +1100, Julian Calaby wrote: >> On Tue, Feb 2, 2016 at 9:27 PM, Chen-Yu Tsai wrote: >> > Add an entry for X-Powers AXP family PMIC drivers and list myself >> > as maintainer. > [] >>

[linux-sunxi] Re: [PATCH v2 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set

Hi, On Wed, Feb 3, 2016 at 5:21 AM, Krzysztof Adamski wrote: > sunxi_pmx_set accepts pin number and then calculates offset by > subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand, > gets offset so we have to convert it to pin number so we won't get > negative

[linux-sunxi] Re: [PATCH v2 1/5] clk: sunxi: Add apb0 gates for H3

On Wed, Feb 3, 2016 at 5:21 AM, Krzysztof Adamski wrote: > This patch adds support for APB0 in H3. It seems to be compatible with > earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR, > etc). > > Signed-off-by: Krzysztof Adamski > --- >

[linux-sunxi] Re: [PATCH v3 1/2] dt-bindings: add sun4i SPDIF transceiver bindings

On 2 February 2016 at 23:31, Maxime Ripard wrote: > Hi, > > On Tue, Feb 02, 2016 at 03:49:53PM +0100, codekip...@gmail.com wrote: >> From: Marcus Cooper >> >> Add devicetree bindings for the SPDIF transceiver found on >> found on Allwinners

[linux-sunxi] Re: [PATCH 03/14] clk: sunxi: add bus gates for A83T

On Sun, Jan 31, 2016 at 09:20:55AM +0800, Vishnu Patekar wrote: > A83T has similar bus gates that of H3, including single gating register has > different clock parent. > > As per H3 and A83T datasheet, usbhost is under AHB2. > > However,below shows allwinner source code assignment: > bits: 26

[linux-sunxi] Re: [PATCH 0/3] mmc: sunxi: Support eMMC DDR modes

On 29 January 2016 at 18:21, Chen-Yu Tsai wrote: > Hi everyone, > > This was "mmc: sunxi: Support vqmmc regulator and eMMC DDR modes". vqmmc > support and DT patches were merged even though it was an RFC series, to > my suprise. > > These are the remaining patches that add eMMC

[linux-sunxi] Re: [PATCH 02/14] clk: sunxi: Add apb0 gates for A83T

On Sun, Jan 31, 2016 at 09:20:54AM +0800, Vishnu Patekar wrote: > APB0 is part of PRCM, and is compatible with earlier SOCs. > apb0 gates controls R_PIO, R_UART, R_RSB, etc clocks. > This patch adds support for APB0 gates for A83T. > > Signed-off-by: Vishnu Patekar