On Wed, Oct 05, 2016 at 12:21:30PM +0200, Jean-Francois Moine wrote:
> On Wed, 5 Oct 2016 11:48:24 +0200
> Corentin Labbe wrote:
>
> > This patch add support for the sunxi-sid driver to the device tree for
> > sun8i-h3.
> >
> > Signed-off-by: Corentin Labbe
> > ---
> > arch/arm/boot/dts/sun8
Hi,
On 19-10-16 05:16, Chen-Yu Tsai wrote:
On Tue, Oct 18, 2016 at 6:14 PM, Hans de Goede wrote:
Hi,
On 17-10-16 23:33, Jarosław Nieć wrote:
Hi Maxime,
On Mon, Oct 17, 2016 at 9:51 PM, Maxime Ripard
mailto:maxime.rip...@free-electrons.com>>
wrote:
Hi Jarosław,
On Mon, Oct 17, 20
On Tue, Oct 18, 2016 at 01:42:09PM +0800, Chen-Yu Tsai wrote:
> On the A31, the DMA engine only works if AHB1 is clocked from PLL6.
> In addition, the hstimer is clocked from AHB1, and if AHB1 is clocked
> from the CPU clock, and cpufreq is working, we get an unstable timer.
>
> Force the AHB1 clo
On Wed, Oct 19, 2016 at 5:53 PM, Hans de Goede wrote:
> Hi,
>
>
> On 19-10-16 05:16, Chen-Yu Tsai wrote:
>>
>> On Tue, Oct 18, 2016 at 6:14 PM, Hans de Goede
>> wrote:
>>>
>>> Hi,
>>>
>>> On 17-10-16 23:33, Jarosław Nieć wrote:
Hi Maxime,
On Mon, Oct 17, 2016 at 9:51
Hi,
On 19-10-16 11:57, Chen-Yu Tsai wrote:
On Wed, Oct 19, 2016 at 5:53 PM, Hans de Goede wrote:
Hi,
On 19-10-16 05:16, Chen-Yu Tsai wrote:
On Tue, Oct 18, 2016 at 6:14 PM, Hans de Goede
wrote:
Hi,
On 17-10-16 23:33, Jarosław Nieć wrote:
Hi Maxime,
On Mon, Oct 17, 2016 at 9:51 PM,
On Tue, Sep 06, 2016 at 04:46:16PM +0200, Maxime Ripard wrote:
> Netron DY is a brand of LCD panels found on SBCs and tablets.
>
> Signed-off-by: Maxime Ripard
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
Hi Rob,
care to give this your A
On Wed, Oct 19, 2016 at 11:53:10AM +0200, Hans de Goede wrote:
> > > If all the hardware allows you to-do is set / read the pin, you
> > > could write a gpio-chip driver for it, and then attach a generic
> > > cec-over-gpio driver to that, that seems like a better idea then
> > > an Allwinner speci
Hi,
On Mon, Oct 17, 2016 at 11:33:45PM +0200, Jarosław Nieć wrote:
> > > I've decided that I want to learn kernel hacking a little and because of
> > > that and because of new HDMI CEC Framework in kernel 4.8 I chose to write
> > > CEC driver for old Allwinner A10.
> > > There in no CEC hardware c
On Wed, Oct 19, 2016 at 7:39 AM, Thierry Reding
wrote:
> On Tue, Sep 06, 2016 at 04:46:16PM +0200, Maxime Ripard wrote:
>> Netron DY is a brand of LCD panels found on SBCs and tablets.
>>
>> Signed-off-by: Maxime Ripard
>> ---
>> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
>> 1
Ah thanks, yes I know them. Any other suggestions, of people that might do
OEM design?
thanks
On Saturday, October 8, 2016 at 5:21:07 PM UTC+1, Bastiaan van den Berg
wrote:
>
> NTC (nextthing company) is also making their own custom allwinner board
> https://nextthing.co/
>
> On Fri, Oct 7, 201
On Wed, Oct 19, 2016 at 2:55 PM, Maxime Ripard <
maxime.rip...@free-electrons.com> wrote:
> On Wed, Oct 19, 2016 at 11:53:10AM +0200, Hans de Goede wrote:
> > > > If all the hardware allows you to-do is set / read the pin, you
> > > > could write a gpio-chip driver for it, and then attach a generi
On Wed, Oct 19, 2016 at 3:02 PM, Maxime Ripard <
maxime.rip...@free-electrons.com> wrote:
> Hi,
>
> On Mon, Oct 17, 2016 at 11:33:45PM +0200, Jarosław Nieć wrote:
> > BTW Implementing general cec-over-gpio driver could be also quite
> > useful for lot of projects.
>
> Rockchip has such a driver al
Some rgb-to-vga bridges have an enable GPIO, either directly tied to
an enable pin on the bridge IC, or indirectly controlling a power
switch.
Add support for it.
Signed-off-by: Chen-Yu Tsai
---
.../bindings/display/bridge/dumb-vga-dac.txt | 2 ++
drivers/gpu/drm/bridge/dumb-vga-dac.c
The A31 TCON has mux controls for how TCON outputs are routed to the
HDMI and MIPI DSI blocks.
Since the A31s does not have MIPI DSI, it only has a mux for the HDMI
controller input.
This patch only adds support for the compatible strings. Actual support
for the mux controls should be added with
Hi everyone,
This series adds support for the first display pipeline found on the
A31 and A31s SoCs, with output through the RGB LCD interface.
This has been tested on the Sinlinx SinA31s development board, with
its included 7" LCD panel, and the Merrii Hummingbird A31 development
board, with its
The LCD0 controller on the A31 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6
The Hummingbird A31 board has a RGB-to-VGA bridge which converts RGB
output from the LCD interface to VGA signals.
Enable this part of the display pipeline.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 56 +
1 file changed, 56 inserti
The A31's display pipeline has 2 frontends, 2 backends, and 2 TCONs. It
also has new display enhancement blocks, such as the DRC (Dynamic Range
Controller), the DEU (Display Enhancement Unit), and the CMU (Color
Management Unit). It supports HDMI, MIPI DSI, and 2 LCD/LVDS channels.
The A31s displa
We already have some differences between the 2 supported SoCs.
More will be added as we support other SoCs. To avoid bloating
the probe function with even more conditionals, move the quirks
to a separate data structure that's tied to the compatible string.
Signed-off-by: Chen-Yu Tsai
---
drivers
The A31 has 2 parallel display pipelines, which can be intermixed.
However the driver currently only supports one of them.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 152 ++
arch/arm/boot/dts/sun6i-a31s.dtsi | 8 ++
2 files changed,
The A31 and A31s also have the DRC as part of the display pipeline.
As we know virtually nothing about them, just add compatible strings
for both SoCs to the stub driver.
Signed-off-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 2 ++
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