On Sat, Oct 29, 2016 at 1:30 AM, Hans de Goede wrote:
> Hi Chen-Yu,
>
> On 28-10-16 12:21, Chen-Yu Tsai wrote:
>>
>> Hi everyone,
>>
>> This series adds full SPL with DRAM initialization for sun9i (A80).
>> The bulk of the work was done by the people at Theobroma Systems.
>>
Hi,
On 28-10-16 18:27, Icenowy Zheng wrote:
Allwinner SoC's PHY 0, when used as OTG controller, have no pmu part.
The code that poke some unknown bit of PMU for H3/A64 didn't check
the PHY, and will cause kernel oops when PHY 0 is used.
This patch will check whether the pmu is not NULL before
HI,
On 26-10-16 12:14, Hans de Goede wrote:
Hi,
On 26-10-16 10:52, Icenowy Zheng wrote:
26.10.2016, 16:28, "Hans de Goede" :
Hi,
On 25-10-16 06:11, Icenowy Zheng wrote:
On some newer Allwinner SoCs (H3 or A64), the PHY0 can be either routed to
the MUSB controller
On Fri, 28 Oct 2016 00:03:16 +0200
Maxime Ripard wrote:
> On Tue, Oct 25, 2016 at 04:14:41PM +0200, Jean-Francois Moine wrote:
> > > > +Display controller
> > > > +==
> > > > +
> > > > +Required properties:
> > > > +
> > > > +- compatible: value
Hi everyone,
This series adds full SPL with DRAM initialization for sun9i (A80).
The bulk of the work was done by the people at Theobroma Systems.
Their work can be found here:
https://git.theobroma-systems.com/armadillo-u-boot.git/
I picked the essential patches and cleaned them up a bit
The A80 has SID e-fuses. Like other newer SoCs, the actual e-fuses
are at an offset of 0x200 within the SID address space.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/include/asm/arch-sunxi/cpu_sun9i.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT
From: Philipp Tomsich
Now that DRAM initialization and clock setup is supported,
we can enable SPL for the A80.
[w...@csie.org: Added commit message]
Signed-off-by: Chen-Yu Tsai
---
board/sunxi/Kconfig | 1 +
1 file changed, 1 insertion(+)
From: Philipp Tomsich
On sun9i, the GTBUS manages transaction priority and bandwidth
for multiple read ports when accessing DRAM. The initialisation
mirrors the settings from Allwinner's boot0 for now, even though
this may not be optimal for all
Both the A80 Optimus board and the Cubieboard 4 use a zq value of
4145117, or 0x3f3fdd.
Signed-off-by: Chen-Yu Tsai
---
board/sunxi/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 5cca1eae73b3..e1d4ab148f08 100644
---
From: Philipp Tomsich
The A80 can support 8-bit eMMC with reset on the PC pingroups.
Signed-off-by: Chen-Yu Tsai
---
board/sunxi/board.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
From: Philipp Tomsich
Since the A80 has many cores which we intend to use in SMP fashion,
we should set the SMP bit for the boot CPU.
[w...@csie.org: Added commit message]
Signed-off-by: Chen-Yu Tsai
---
arch/arm/mach-sunxi/board.c | 3 ++-
The Cubieboard4 is an A80 SoC based development board from Cubietech.
This board has a UART port, 4 USB host ports, a USB 3.0 OTG connector,
HDMI and VGA outputs, a micro SD slot, 8G eMMC flash, 2G DRAM, a WiFi/BT
combo chip, headphone and microphone jacks, IR receiver, and GPIO headers.
In Allwinner's SDK the A80 is clocked to 1008 MHz by default.
Signed-off-by: Chen-Yu Tsai
---
board/sunxi/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index ee6ae37fb7ef..5cca1eae73b3 100644
---
From: Philipp Tomsich
This adds DRAM initialisation code for sun9i, which calculates the
appropriate timings based on timing information for the supplied
DDR3 bin and the clock speeds used.
With this DRAM setup, we have verified DDR3 clocks of up to 792MHz
From: Philipp Tomsich
This is a cleaned up version set_pll() from Allwinner's boot0 source
(bootloader/basic_loader/bsp/bsp_for_a80/common/common.c).
[w...@csie.org: Added commit message; style cleanup]
Signed-off-by: Chen-Yu Tsai
---
It works now.
I forgot to set MACC_ISP_OUTPIC_STRIDE, just MACC_ISP_PIC_STRIDE.
I do not know how i did not see that, sorry and thank you very much again.
--
Milos Ladicorbic
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try this code.
drivers\net\wireless\broadcom\brcm80211\brcmfmac\bcmsdh.c
static int brcmf_sdiod_buffrw(struct brcmf_sdio_dev *sdiodev, uint fn,
bool write, u32 addr, struct sk_buff *pkt)
{
unsigned int req_sz;
int err;
/* Single skb use the standard mmc interface */
req_sz = pkt->len + 3;
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