The X-Powers AXP20X and AXP22X PMICs have multiple ADCs. They expose the
battery voltage, battery charge and discharge currents, AC-in and VBUS
voltages and currents, 2 GPIOs muxable in ADC mode and PMIC temperature.
This adds support for most of AXP20X and AXP22X ADCs.
Signed-off-by: Quentin Sch
Hi Rob,
On Wed, Mar 15, 2017 at 12:26:22PM -0500, Rob Herring wrote:
> > +HDMI Encoder
> > +
> > +
> > +The HDMI Encoder supports the HDMI video and audio outputs, and does
> > +CEC. It is one end of the pipeline.
> > +
> > +Required properties:
> > + - compatible: value must be one o
On Wed, Mar 29, 2017 at 08:58:26AM +0100, Lee Jones wrote:
> On Tue, 21 Mar 2017, Quentin Schulz wrote:
>
> > This patch removes the sun4i touchscreen controller binding
> > documentation since it has been merged with the sun4i GPADC binding
> > documentation.
> >
> > Signed-off-by: Quentin Schul
On Mon, Apr 03, 2017 at 04:51:54PM +0100, Richard W.M. Jones wrote:
>
> https://linux-sunxi.org/Pine64#Mainline_kernel
>
> I'm having some issues with /dev/kvm on apritzel's 4.9-derived kernel
> that I'm using (from the link above).
>
> Does anyone have a more recent kernel with MMC, USB and Eth
在 2017年04月03日 23:33, Rob Herring 写道:
On Thu, Mar 30, 2017 at 03:46:03AM +0800, Icenowy Zheng wrote:
From: Icenowy Zheng
Allwinner "Display Engine 2.0" contains some clock controls in it.
In order to add them as clock drivers, we need a device tree binding.
Add the binding here.
Signed-off-
https://linux-sunxi.org/Pine64#Mainline_kernel
I'm having some issues with /dev/kvm on apritzel's 4.9-derived kernel
that I'm using (from the link above).
Does anyone have a more recent kernel with MMC, USB and Ethernet
all working, or is it recommended to move to the mainline upstream
kernel no
On Thu, Mar 30, 2017 at 03:46:03AM +0800, Icenowy Zheng wrote:
> From: Icenowy Zheng
>
> Allwinner "Display Engine 2.0" contains some clock controls in it.
>
> In order to add them as clock drivers, we need a device tree binding.
> Add the binding here.
>
> Signed-off-by: Icenowy Zheng
> ---
>
On Wed, Mar 29, 2017 at 06:42:42PM +0800, Icenowy Zheng wrote:
> From: Icenowy Zheng
>
> Many Allwinner SoCs after A31 have a CCU in PRCM block.
>
> Give the ones on H3 and A64 compatible strings.
>
> Signed-off-by: Icenowy Zheng
> ---
> Changes in v3:
> - Removed frequency info of iosc in thi
Hey Joe,
On 26-03-17 16:10, Joe Hershberger wrote:
Hi Oliver,
On Sun, Dec 11, 2016 at 3:27 PM, Simon Glass wrote:
Hi Oliver,
On 9 December 2016 at 02:25, Olliver Schinagl wrote:
Hey simon
On December 8, 2016 11:21:32 PM CET, Simon Glass wrote:
Hi Oliver,
On 7 December 2016 at 02:26, Ol
On Sun, 02 Apr 2017, Icenowy Zheng wrote:
> As the H3 SoC, which is also in sun8i line, has totally different
> register map for the thermal sensor (a cut down version of GPADC), we
> should rename A23/A33-specified registers to contain A23, in order to
> prevent obfuscation with H3 registers. Cur
On Mon, Mar 27, 2017 at 10:38:46PM +0800, Chen-Yu Tsai wrote:
> The display backend has an interrupt line. Add it to the device tree
> binding.
>
> Signed-off-by: Chen-Yu Tsai
> ---
> Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 2 ++
> 1 file changed, 2 insertions(+)
Acked-b
Em domingo, 2 de abril de 2017 19:51:03 UTC-3, Emilio López escreveu:
>
> Hi,
>
> El 30/03/17 a las 23:48, Vinicius Maciel escribió:
> > Hi,
> >
> > I'm calling spi_sync_transfer inside a threaded interrupt function and
> > makes kernel crash.
> > Threaded interrupt functions are supposed c
Hi,
Just commented on the wiki page about using an Arduino as a USB-serial
adaptor, that the main chip (atmega328p for ex) can be disabled by
wiring RESET to GND, no need to remove it. Recent arduinos are
soldered on board as well, so they cannot be easily removed.
A third alternative is to apply
Hi,
On Mon, Apr 03, 2017 at 11:12:45AM +0200, Alexander Syring wrote:
> The Cubietruck has an AXP209 PMIC and can be power-supplied by ACIN via
> the CHG-IN pin or by USB.
>
> This enables the ACIN and the USB power supply subnode in the DT.
>
> Signed-off-by: Alexander Syring
> ---
>
> Send
On Mon, Apr 3, 2017 at 4:14 PM, Maxime Ripard
wrote:
> Hi,
>
> On Thu, Mar 30, 2017 at 03:46:06AM +0800, Icenowy Zheng wrote:
>> As we are going to add support for the Allwinner DE2 Mixer in sun4i-drm
>> driver, we will finally have two types of layer.
>>
>> Abstract the layer type to void * and a
在 2017年04月03日 17:15, Maxime Ripard 写道:
On Sun, Apr 02, 2017 at 09:33:01PM +0800, Icenowy Zheng wrote:
Allwinner H3 features a thermal sensor like the one in A33, but has its
register re-arranged, the clock divider moved to CCU (originally the
clock divider is in ADC) and added a pair of bus cl
On Sun, Apr 02, 2017 at 09:33:01PM +0800, Icenowy Zheng wrote:
> Allwinner H3 features a thermal sensor like the one in A33, but has its
> register re-arranged, the clock divider moved to CCU (originally the
> clock divider is in ADC) and added a pair of bus clock and reset.
>
> Update the binding
Hi,
That's much better thanks, but I have a bunch of (minor) comments.
On Thu, Mar 30, 2017 at 03:46:07AM +0800, Icenowy Zheng wrote:
> diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c
> b/drivers/gpu/drm/sun4i/sun4i_crtc.c
> index 33854ee7f636..938dfe7188ff 100644
> --- a/drivers/gpu/drm/sun4i/s
Hi,
On Thu, Mar 30, 2017 at 03:46:06AM +0800, Icenowy Zheng wrote:
> As we are going to add support for the Allwinner DE2 Mixer in sun4i-drm
> driver, we will finally have two types of layer.
>
> Abstract the layer type to void * and a ops struct, which contains the
> only function used by crtc -
On Thu, Mar 30, 2017 at 03:46:05AM +0800, Icenowy Zheng wrote:
> From: Icenowy Zheng
>
> Allwinner V3s SoC have a display engine which have a different pipeline
> with older SoCs.
>
> Add document for it (new compatibles and the new "mixer" part).
>
> The paragraph of TCON is also refactored, f
On Mon, Apr 03, 2017 at 12:32:08AM +0800, Icenowy Zheng wrote:
>
>
> On Sun, 2 Apr 2017, Maxime Ripard wrote:
>
> > Hi,
> >
> > On Wed, Mar 29, 2017 at 06:42:41PM +0800, Icenowy Zheng wrote:
> > > Allwinner SoCs after sun6i-a31 nearly all have a R_CCU in PRCM part.
> > > (V3s and R40 do not hav
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