[linux-sunxi] Re: [PATCH v13 05/14] ASoC: sun4i-codec: Merge sun4i_codec_left_mixer_controls and sun4i_codec_right_mixer_controls into sun4i_codec_mixer_controls.

On Mon, Jun 26, 2017 at 09:48:59AM +0800, Chen-Yu Tsai wrote: > On Sat, Jun 24, 2017 at 2:24 PM, Danny Milosavljevic > wrote: > > Since it's now possible to have a DAPM mixer control with multiple channels, > > use it to cut down the total number of controls. > > > >

[linux-sunxi] Re: [PATCH v4] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

On Sat, Jun 24, 2017 at 04:10:54PM +1000, Jonathan Liu wrote: > The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states: > "As in the general case the DDC bus is accessible by the kernel at the I2C > level, drivers must make all reasonable efforts to expose it as an I2C >

[linux-sunxi] Re: [PATCH 2/6] dt-bindings: mfd: axp20x: Introduce bindings for AXP813

On Thu, Jun 22, 2017 at 12:08:29PM +0800, Chen-Yu Tsai wrote: > The X-Powers AXP813 is a PMIC designed to be paired with Allwinner's > A83T SoC. There is also an AXP818, which is paired with the H8 SoC. > > The two models seem to be identical, apart from the external markings. > > This patch

[linux-sunxi] Re: [PATCH 1/6] dt-bindings: mfd: axp20x: Add AXP806 to supported list of chips

On Thu, Jun 22, 2017 at 12:08:28PM +0800, Chen-Yu Tsai wrote: > The binding already lists compatibles and regulators for the AXP806, > but it is missing from the list of supported chips at the beginning. > > Add it. > > Fixes: 204ae2963e10 ("mfd: axp20x: Add bindings for AXP806 PMIC") >

[linux-sunxi] Re: [PATCH v3 2/3] dt-bindings: input: Add R_LRADC support for A83T

Hi, On Sat, Jun 24, 2017 at 10:45:14AM +0800, Ziping Chen wrote: > From: Ziping Chen > > Allwinner A83T SoC has a low res adc like the one > in Allwinner A10 SoC. > > Add binding for it. > > Signed-off-by: Ziping Chen > Acked-by: Rob Herring

[linux-sunxi] Re: [PATCH v3 1/3] input: sun4i-a10-lradc-keys: Add support for A83T

On Sat, Jun 24, 2017 at 10:45:13AM +0800, Ziping Chen wrote: > From: Ziping Chen > > Allwinner A83T SoC has a low res adc like the one > in Allwinner A10 SoC, however, the A10 SoC's vref > of lradc internally is divided by 2/3 and the A83T > SoC's vref of lradc

[linux-sunxi] [PATCH] ARM: dts: sun4i: Add A10 LCD0 RGB888 pins

The LCD0 controller on the A10 can do RGB output up to 8 bits per channel. Add the pins for RGB888 output. Signed-off-by: Jonathan Liu --- arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi

[linux-sunxi] [PATCH v2] ARM: dts: sun7i: Add A20 LCD0 RGB888 pins

The LCD0 controller on the A20 can do RGB output up to 8 bits per channel. Add the pins for RGB888 output. Signed-off-by: Jonathan Liu --- Changes for v2: - Remove "allwinner," prefix from pins and function arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++ 1 file changed,

[linux-sunxi] Re: [PATCH] ARM: dts: sun7i: Add A20 LCD0 RGB888 pins

Hi Emmanuel, On 26 June 2017 at 22:45, Emmanuel Vadot wrote: > On Mon, 26 Jun 2017 22:42:49 +1000 > Jonathan Liu wrote: > >> The LCD0 controller on the A20 can do RGB output up to 8 bits per >> channel. Add the pins for RGB888 output. >> >>

[linux-sunxi] [PATCH] ARM: dts: sun7i: Add A20 LCD0 RGB888 pins

The LCD0 controller on the A20 can do RGB output up to 8 bits per channel. Add the pins for RGB888 output. Signed-off-by: Jonathan Liu --- arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi

[linux-sunxi] [PATCH v4] crypto: sun4i-ss: support the Security System PRNG

The Security System have a PRNG, this patch add support for it via crypto_rng. Signed-off-by: Corentin Labbe --- Changes since v3 (note: the v3 miss changes and version tag sorry) - Replaced all len values with bits / BITS_PER_LONG or BITS_PER_BYTE Changes since v2

Re: [linux-sunxi] [PATCH v4 1/6] clk: sunxi-ng: div: Add support for fixed post-divider

Hi Priit, On 26 June 2017 at 15:53, Priit Laes wrote: > On Mon, Jun 26, 2017 at 08:05:16AM +1000, Jonathan Liu wrote: >> Hi Priit, >> >> This is showing from clock rate of 171428572 in the output of "cat >> /sys/kernel/debug/clk/clk_summary" for pll-periph-sata. >> The clock