On Thu, Mar 14, 2019 at 02:06:56PM +0100, Paul Kocialkowski wrote:
> This is an H3-based board that sticks close to the reference design.
>
> Supported features:
> * UART
> * DRAM
> * MMC
> * eMMC
> * Ethernet
> * USB host
> * USB peripheral
> * HDMI
>
> Signed-off-by: Paul Kocialkowski
> ---
>
On Thu, Mar 14, 2019 at 07:21:08PM +0800, Icenowy Zheng wrote:
> The bit offset of the USB PHY clock gate on F1C100s should be 1, not 8.
>
> Fix this problem.
>
> Fixes: 0380126eb9af ("clk: sunxi-ng: add support for suniv F1C100s SoC")
> Signed-off-by: Icenowy Zheng
Applied, thanks!
Maxime
--
This is an H3-based board that sticks close to the reference design.
Supported features:
* UART
* DRAM
* MMC
* eMMC
* Ethernet
* USB host
* USB peripheral
* HDMI
Signed-off-by: Paul Kocialkowski
---
arch/arm/boot/dts/Makefile | 1 +
On platforms where the MUSB and HCI controllers share PHY0, PHY passby
is required when using the HCI controller with the PHY, but it must be
disabled when the MUSB controller is used instead.
Without this, PHY0 passby is always enabled, which results in broken
peripheral mode on such platforms
Hi Julian,
On Thu, 2019-03-14 at 22:19 +1100, Julian Calaby wrote:
> Hi Paul,
>
> On Thu, Mar 14, 2019 at 9:37 PM Paul Kocialkowski
> wrote:
> > A few sun8i platforms define specific default DRAM ZQ values, but they
> > are not taken in account because of MACH_SUN8I being used for the 123
> >
The bit offset of the USB PHY clock gate on F1C100s should be 1, not 8.
Fix this problem.
Fixes: 0380126eb9af ("clk: sunxi-ng: add support for suniv F1C100s SoC")
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Hi Paul,
On Thu, Mar 14, 2019 at 9:37 PM Paul Kocialkowski
wrote:
>
> A few sun8i platforms define specific default DRAM ZQ values, but they
> are not taken in account because of MACH_SUN8I being used for the 123
> default first.
>
> Replace MACH_SUN8I with the list of platforms that don't have
This is an H3-based board that sticks close to the reference design.
Supported features:
* UART
* DRAM
* MMC
* eMMC
* Ethernet
* USB host
* USB peripheral
* HDMI
Signed-off-by: Paul Kocialkowski
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/sun8i-h3-rervision-dvk.dts | 107
Recent Allwinner platforms (starting with the H3) only use the MUSB
controller for peripheral mode and use HCI for host mode. As a result,
extra steps need to be taken to properly route USB signals to one or
the other. More precisely, the following is required:
* Routing the pins to either
Most of the boards we support with H3/H5 enable DRAM on-die termination,
which is consistent with the high DRAM clocks that are used.
Make it the default (like it's done for other similar platforms) instead
of defining it in each defconfig.
Signed-off-by: Paul Kocialkowski
---
Most H3/H5 boards we support have the DRAM ZQ value set to 3881979,
which is also consistent with the default set for the R40.
Make this value the default on H3/H5 instead of 123.
Signed-off-by: Paul Kocialkowski
---
arch/arm/mach-sunxi/Kconfig | 5 ++---
A few sun8i platforms define specific default DRAM ZQ values, but they
are not taken in account because of MACH_SUN8I being used for the 123
default first.
Replace MACH_SUN8I with the list of platforms that don't have specific
DRAM ZQ values, to avoid overwriting the default for those that do.
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