Quoting Hans de Goede (2014-11-19 05:48:59)
If CLK_MUX_INDEX_BIT is set, then each bit turns on / off a single parent,
so theoretically multiple parents could be enabled at the same time, but in
practice only one bit should ever be 1. So to select parent 0, set
the register (*) to 0x01, to
:
A simple-framebuffer node represents a framebuffer setup by
the firmware /
bootloader. Such a framebuffer may have a number of clocks in
use, add a
property to communicate this to the OS.
Signed-off-by: Hans de Goede hdego...@redhat.com
Reviewed-by: Mike Turquette mturque...@linaro.org
On Wed, Oct 1, 2014 at 12:30 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Tue, Sep 30, 2014 at 02:37:53PM -0700, Mike Turquette wrote:
Quoting Thierry Reding (2014-09-29 06:54:00)
On Mon, Sep 29, 2014 at 01:34:36PM +0200, Maxime Ripard wrote:
On Mon, Sep 29, 2014 at 12:44:57PM
clk_ignore_unused should be revised, then. What you
describe isn't at all what I'd expect from such an option. And it does
not match the description in Documentation/kernel-parameters.txt either.
From e156ee56cbe26c9e8df6619dac1a993245afc1d5 Mon Sep 17 00:00:00 2001
From: Mike Turquette mturque
hdego...@redhat.com
Acked-by: Mike Turquette mturque...@linaro.org
or
Reviewed-by: Mike Turquette mturque...@linaro.org
I don't know what is the right thing with these binding definitions...
Also I have one suggestion below:
---
Documentation/devicetree/bindings/video/simple-framebuffer.txt | 3
Quoting Maxime Ripard (2014-09-02 02:25:08)
On Fri, Aug 29, 2014 at 04:38:14PM +0200, Thierry Reding wrote:
On Fri, Aug 29, 2014 at 04:12:44PM +0200, Maxime Ripard wrote:
On Fri, Aug 29, 2014 at 09:01:17AM +0200, Thierry Reding wrote:
I would think the memory should still be reserved
Quoting Chen-Yu Tsai (2014-09-25 17:55:27)
On Fri, Sep 26, 2014 at 8:25 AM, Mike Turquette mturque...@linaro.org wrote:
Quoting Maxime Ripard (2014-09-11 13:36:23)
Hi Chen-Yu,
On Sat, Sep 06, 2014 at 06:47:21PM +0800, Chen-Yu Tsai wrote:
Hi everyone,
This series unifies the mux
Quoting Maxime Ripard (2014-09-13 03:26:03)
On Fri, Sep 12, 2014 at 11:16:26AM +0800, Chen-Yu Tsai wrote:
Hi,
On Fri, Sep 12, 2014 at 5:02 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi,
On Sat, Sep 06, 2014 at 06:47:24PM +0800, Chen-Yu Tsai wrote:
This patch
Quoting Chen-Yu Tsai (2014-06-26 08:55:38)
Hi everyone,
This is v4 of the sun8i clock series, which adds basic clock
support for the A23 SoC. It is based on my initial sun8i bring
up series [1]. This series was split up from the original A23
series [2]. Yet to come are more clocks, reset
Quoting Boris BREZILLON (2014-05-14 00:30:59)
Hello Mike,
On 14/05/2014 02:51, Mike Turquette wrote:
Quoting Boris BREZILLON (2014-05-09 04:11:49)
+struct clk_ops ar100_ops = {
+ .recalc_rate = ar100_recalc_rate,
+ .determine_rate = ar100_determine_rate
Quoting Emilio López (2014-05-10 10:22:15)
Hi Maxime,
El 10/05/14 00:33, Maxime Ripard escribió:
Hi everyone,
This patchset fixes a few things that have been pending for quite a
while in the clock driver.
First, it removes the clk_put calls in the clock protection
part. Since
Quoting Arnd Bergmann (2014-04-23 06:31:06)
On Wednesday 23 April 2014 15:17:20 Maxime Ripard wrote:
+#include linux/clk.h
#include linux/init.h
#include linux/of_platform.h
@@ -19,9 +20,17 @@
static void __init sun4i_dt_init(void)
{
+ struct clk
-by: Hans de Goede hdego...@redhat.com
Acked-by: Mike Turquette mturque...@linaro.org
---
drivers/clk/sunxi/clk-sunxi.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index bd7dc733c1ca..d9bab75f128b 100644
--- a/drivers
Quoting Hans de Goede (2014-05-02 08:57:14)
The first 2 patches are depenencies which should go in through the clk tree,
Mike can you pick these 2 up please ? :
Taken into clk-next.
clk: sunxi: factors: automatic reparenting support
Is uncontroversial and has been favorably reviewed by
Quoting Maxime Ripard (2014-03-13 08:14:13)
Callers of clk_put must disable the clock first. This also means that as long
as the clock is enabled the driver should hold a reference to that clock.
Hence, the call to clk_put here are bogus and should be removed.
Signed-off-by: Maxime Ripard
Quoting Maxime Ripard (2014-02-19 00:36:06)
Hi Mike,
On Tue, Feb 18, 2014 at 09:21:25PM -0800, Mike Turquette wrote:
Quoting Maxime Ripard (2014-02-18 06:15:32)
Hi,
On Mon, Feb 17, 2014 at 11:02:21AM +0100, David Lanzendörfer wrote:
From: Emilio López emi...@elopez.com.ar
Quoting Chen-Yu Tsai (2014-02-10 02:35:47)
The Allwinner A20/A31 clock module controls the transmit clock source
and interface type of the GMAC ethernet controller. Model this as
a single clock for GMAC drivers to use.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Looks good to me.
Regards,
Quoting Maxime Ripard (2014-02-05 05:05:03)
The A31 has a slightly different PLL6 clock. Add support for this new clock in
our driver.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Looks good to me.
Regards,
Mike
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1
Quoting Chen-Yu Tsai (2013-12-24 05:26:17)
This patch adds support for the external clock outputs on the
Allwinner A20 SoC. The clock outputs are similar to module 0
type clocks, with different offsets and widths for clock factors.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Looks good to me.
Quoting Emilio López (2013-12-23 08:23:47)
Hi again,
El 23/12/13 13:13, Emilio López escribió:
Hi,
El 23/12/13 05:37, Chen-Yu Tsai escribió:
This patch adds support for the external clock outputs on the
Allwinner A20 SoC. The clock outputs are similar to module 0
type clocks, with
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