Hi Clément,
On 24.10.20 at 15:00, Clément Péron wrote:
> Hi Philip
>
>
>
>>>
>>> I catched a slight difference between the mainline and vendor driver
>>> in DDR mode.
>>>
>>> the phase is set to 1
>>> case MMC_TIMING_UHS_DDR50:
>>> case MMC_TIMING_MMC_DDR52:
>>> dat_drv_ph = 1;
>>> speed_mod =
Hi Philip
> >
> > I catched a slight difference between the mainline and vendor driver
> > in DDR mode.
> >
> > the phase is set to 1
> > case MMC_TIMING_UHS_DDR50:
> > case MMC_TIMING_MMC_DDR52:
> > dat_drv_ph = 1;
> > speed_mod = SM2_HSDDR52_DDR50;
> > break;
> >
> > Could you add a hack in
Hi Clément,
Am 23.10.20 um 10:45 schrieb Clément Péron:
> Hi Philip and Chen-Yu
>
> (+Chen-Yu added as He also have the issue for H5)
>
> On Thu, 22 Oct 2020 at 17:39, Clément Péron wrote:
>>
>> Hi Maxime,
>>
>> On Thu, 22 Oct 2020 at 11:13, Maxime Ripard wrote:
>>>
>>> Hi,
>>>
>>> On Thu,
Hi Philip and Chen-Yu
(+Chen-Yu added as He also have the issue for H5)
On Thu, 22 Oct 2020 at 17:39, Clément Péron wrote:
>
> Hi Maxime,
>
> On Thu, 22 Oct 2020 at 11:13, Maxime Ripard wrote:
> >
> > Hi,
> >
> > On Thu, Oct 22, 2020 at 09:52:29AM +0200, Clément Péron wrote:
> > > Hi Philipp,
Hi Maxime,
On Thu, 22 Oct 2020 at 11:13, Maxime Ripard wrote:
>
> Hi,
>
> On Thu, Oct 22, 2020 at 09:52:29AM +0200, Clément Péron wrote:
> > Hi Philipp,
> >
> > On Thu, 22 Oct 2020 at 00:10, Philip Rinn wrote:
> > >
> > > Hi,
> > >
> > > the Olimex A64-OLinuXino board comes in various variants,
Hi,
On Thu, Oct 22, 2020 at 09:52:29AM +0200, Clément Péron wrote:
> Hi Philipp,
>
> On Thu, 22 Oct 2020 at 00:10, Philip Rinn wrote:
> >
> > Hi,
> >
> > the Olimex A64-OLinuXino board comes in various variants, three with eMMC.
> > While MMC HS-DDR mode works fine on one of them
Hi Philipp,
On Thu, 22 Oct 2020 at 00:10, Philip Rinn wrote:
>
> Hi,
>
> the Olimex A64-OLinuXino board comes in various variants, three with eMMC.
> While MMC HS-DDR mode works fine on one of them (A64-OLinuXino-1Ge4GW) it
> doesn't work on the A64-OLinuXino-2Ge8G-IND variant (I don't have the
Hi,
the Olimex A64-OLinuXino board comes in various variants, three with eMMC.
While MMC HS-DDR mode works fine on one of them (A64-OLinuXino-1Ge4GW) it
doesn't work on the A64-OLinuXino-2Ge8G-IND variant (I don't have the
third variant so I can't check if it works there).
Disabling MMC HS-DDR
