On Thu, Jan 19, 2017 at 6:41 PM, Maxime Ripard
wrote:
> That's not true anymore. And while it's true that it reduces the
> amount of maintainance on the kernel side and more on the DT side. And
> from what you're constantly saying, the thing we can't plan on
On Wed, Jan 18, 2017 at 09:44:37AM +, Andre Przywara wrote:
> Hi,
>
> On 16/01/17 16:31, Maxime Ripard wrote:
> > On Mon, Jan 09, 2017 at 12:16:00AM +, André Przywara wrote:
> >> On 05/01/17 22:42, Maxime Ripard wrote:
> >>> On Fri, Dec 30, 2016 at 01:55:44PM +0100, Linus Walleij wrote:
>
On Thu, Jan 19, 2017 at 09:11:49PM +0800, Icenowy Zheng wrote:
> 19.01.2017, 17:23, "Linus Walleij" :
> > On Wed, Jan 18, 2017 at 10:44 AM, Andre Przywara
> > wrote:
> >
> >> Any future SoCs could then just use that compatible and would describe
On Wed, Jan 18, 2017 at 10:44 AM, Andre Przywara wrote:
> Any future SoCs could then just use that compatible and would describe
> the SoC details in the DT, like it's meant to be and like we do already,
> but extended by putting the mux value in there as well.
> So the
Hi,
On 16/01/17 16:31, Maxime Ripard wrote:
> On Mon, Jan 09, 2017 at 12:16:00AM +, André Przywara wrote:
>> On 05/01/17 22:42, Maxime Ripard wrote:
>>> On Fri, Dec 30, 2016 at 01:55:44PM +0100, Linus Walleij wrote:
On Mon, Dec 26, 2016 at 3:33 PM, André Przywara
On Mon, Jan 09, 2017 at 12:16:00AM +, André Przywara wrote:
> On 05/01/17 22:42, Maxime Ripard wrote:
> > On Fri, Dec 30, 2016 at 01:55:44PM +0100, Linus Walleij wrote:
> >> On Mon, Dec 26, 2016 at 3:33 PM, André Przywara
> >> wrote:
> >>
> >>> So while this patch
On 05/01/17 22:42, Maxime Ripard wrote:
> On Fri, Dec 30, 2016 at 01:55:44PM +0100, Linus Walleij wrote:
>> On Mon, Dec 26, 2016 at 3:33 PM, André Przywara
>> wrote:
>>
>>> So while this patch technically looks correct, I was wondering if we
>>> should really explore the
On Fri, Dec 30, 2016 at 01:55:44PM +0100, Linus Walleij wrote:
> On Mon, Dec 26, 2016 at 3:33 PM, André Przywara
> wrote:
>
> > So while this patch technically looks correct, I was wondering if we
> > should really explore the possibility of making the whole of sunxi
> >
On Mon, Dec 26, 2016 at 3:33 PM, André Przywara wrote:
> So while this patch technically looks correct, I was wondering if we
> should really explore the possibility of making the whole of sunxi
> pinctrl DT controlled.
> I brought this up a while ago, but people weren't
Hi,
On 23/12/16 12:50, Icenowy Zheng wrote:
> Based on the Allwinner H5 datasheet and the pinctrl driver of the
> backward-compatible H3 this introduces the pin multiplex assignments for
> the H5 SoC.
>
> H5 introduced some more pin functions (e.g. three more groups of TS
> pins, and one more
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