Hi Hans,
On Sat, Mar 01, 2014 at 05:32:40PM +0100, Hans de Goede wrote:
On 02/28/2014 05:37 PM, Maxime Ripard wrote:
In order for the DMA controller to work for SDRAM to devices transfers, the
AHB
clock should be reparented on the PLL6.
Force that parenting in the clock driver.
Hi,
On 02/28/2014 05:37 PM, Maxime Ripard wrote:
In order for the DMA controller to work for SDRAM to devices transfers, the
AHB
clock should be reparented on the PLL6.
Force that parenting in the clock driver.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
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