Since dwmac-sun8i could use either an integrated PHY or an external PHY (which could be at same MDIO address), we need to represent this selection by a MDIO switch.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com> --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 3b7d953429a6..a8e9b8f378ba 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -422,14 +422,33 @@ #size-cells = <0>; status = "disabled"; - mdio: mdio { + mdio0: mdio { #address-cells = <1>; #size-cells = <0>; - int_mii_phy: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; - clocks = <&ccu CLK_BUS_EPHY>; - resets = <&ccu RST_BUS_EPHY>; + compatible = "snps,dwmac-mdio"; + + mdio-mux { + compatible = "mdio-mux"; + #address-cells = <1>; + #size-cells = <0>; + /* Only one MDIO is usable at the time */ + internal_mdio: mdio@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + int_mii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + clocks = <&ccu CLK_BUS_EPHY>; + resets = <&ccu RST_BUS_EPHY>; + phy-is-integrated; + }; + }; + mdio: mdio@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; }; }; }; -- 2.13.5 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.