Define the necessary nodes in the A23/A33 dtsi files to make the
SPI0 controller accessible.
The SoCs also have a secondary SPI controller (SPI1), but it
cannot be muxed to any available pins and therefore doesn't get
included in the dtsi.
Signed-off-by: Karsten Merker <mer...@debian.org>
---
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 38 ++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/sun8i-a23.dtsi | 12 ++++++++++++
arch/arm/boot/dts/sun8i-a33.dtsi | 12 ++++++++++++
3 files changed, 62 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 6d6509c..a076b5d 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -3,6 +3,8 @@
*
* Chen-Yu Tsai <w...@csie.org>
*
+ * Copyright 2016 Karsten Merker <mer...@debian.org>
+ *
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
@@ -247,6 +249,14 @@
clock-output-names = "nand";
};
+ spi0_clk: clk@1c200a0 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-mod0-clk";
+ reg = <0x01c200a0 0x4>;
+ clocks = <&osc24M>, <&pll6 0>;
+ clock-output-names = "spi0";
+ };
+
usb_clk: clk@01c200cc {
#clock-cells = <1>;
#reset-cells = <1>;
@@ -435,6 +445,34 @@
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
+
+ spi0_pins_a: spi0@0 {
+ allwinner,pins = "PH7", "PH8", "PH9";
+ allwinner,function = "spi0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi0_cs0_pins_a: spi0_cs0@0 {
+ allwinner,pins = "PH6";
+ allwinner,function = "spi0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi0_pins_b: spi0@1 {
+ allwinner,pins = "PC0", "PC1", "PC2";
+ allwinner,function = "spi0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ spi0_cs0_pins_b: spi0_cs0@1 {
+ allwinner,pins = "PC3";
+ allwinner,function = "spi0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
};
ahb1_rst: reset@01c202c0 {
diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 92e6616..f55dc50 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -3,6 +3,8 @@
*
* Chen-Yu Tsai <w...@csie.org>
*
+ * Copyright 2016 Karsten Merker <mer...@debian.org>
+ *
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
@@ -85,6 +87,16 @@
};
soc@01c00000 {
+ spi0: spi@01c68000 {
+ compatible = "allwinner,sun8i-a23-spi";
+ reg = <0x01c68000 0x1000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ahb1_gates 20>, <&spi0_clk>;
+ clock-names = "ahb", "mod";
+ resets = <&ahb1_rst 20>;
+ status = "disabled";
+ };
+
usb_otg: usb@01c19000 {
compatible = "allwinner,sun6i-a31-musb";
reg = <0x01c19000 0x0400>;
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 001d840..e94aea1 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -3,6 +3,8 @@
*
* Chen-Yu Tsai <w...@csie.org>
*
+ * Copyright 2016 Karsten Merker <mer...@debian.org>
+ *
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
@@ -127,6 +129,16 @@
reset-names = "ahb";
};
+ spi0: spi@01c68000 {
+ compatible = "allwinner,sun8i-a23-spi";
+ reg = <0x01c68000 0x1000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ahb1_gates 20>, <&spi0_clk>;
+ clock-names = "ahb", "mod";
+ resets = <&ahb1_rst 20>;
+ status = "disabled";
+ };
+
usb_otg: usb@01c19000 {
compatible = "allwinner,sun8i-a33-musb";
reg = <0x01c19000 0x0400>;
--
2.1.4
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