..I am referring to the register in address: 0x01c20250
On Sunday, August 31, 2014 3:30:49 PM UTC+3, RFat wrote:
>
> I saw that when over clocking A31 with AnTuTu the PLL1 Tune changes. I
> have no clue or any documentation as to what this her does (the function of
> its bits).
>
> Anyone has an
I saw that when over clocking A31 with AnTuTu the PLL1 Tune changes. I have
no clue or any documentation as to what this her does (the function of its
bits).
Anyone has any idea?
Raanan
On Sunday, August 31, 2014 11:59:29 AM UTC+3, RFat wrote:
>
> Hi Siahrhei,
>
> Thank you for your suggestion
Hi Siahrhei,
Thank you for your suggestion. I believe I am turning on the cache by
calling:
void cpu_dcache_enable(void) {
u32 reg ;
reg = get_cr();
timer_delay_ms(1) ;
set_cr(reg | CR_C);
}
void cpu_icache_enable(void) {
u32 reg ;
reg = get_cr();
timer_del
On Mon, 25 Aug 2014 05:43:04 -0700 (PDT)
RFat wrote:
> Hi all,
>
> I am trying to overclock the A31 higher than 1008MHz
Are you fine with the deterioration of reliability and/or overheating
under high load?
> and I am getting deterioration in performance.
>
> The way I work is execute a smal
Hi all,
I am trying to overclock the A31 higher than 1008MHz and I am getting
deterioration in performance.
The way I work is execute a small program from u-boot which redefines the N
multiplayer of PLL1 and then runs some CPU-intentive routine (to measure
performance).
Here are the results I
