On Thu, May 8, 2014 at 5:04 AM, Maxime Ripard
wrote:
>> >> > I believe this will be used for toggling the SRAM mappings. (Am I
>> >> > right?)
>> >>
>> >> Definitely right.
>> >>
>> >> > The second register toggles mappings for MUSB FIFO, EMAC, and a few of
>> >> > the other IP blocks we curre
On Wed, May 07, 2014 at 10:19:19AM +0200, Carlo Caione wrote:
> On Wed, May 7, 2014 at 5:25 AM, Maxime Ripard
> wrote:
> > On Tue, May 06, 2014 at 10:03:19AM +0200, Carlo Caione wrote:
> >> On Tue, May 6, 2014 at 8:36 AM, Chen-Yu Tsai wrote:
> >> > Hi,
> >>
> >> Hi,
> >>
> >> > On Tue, May 6, 201
On Wed, May 7, 2014 at 5:25 AM, Maxime Ripard
wrote:
> On Tue, May 06, 2014 at 10:03:19AM +0200, Carlo Caione wrote:
>> On Tue, May 6, 2014 at 8:36 AM, Chen-Yu Tsai wrote:
>> > Hi,
>>
>> Hi,
>>
>> > On Tue, May 6, 2014 at 6:55 AM, Maxime Ripard
>> > wrote:
>> >> On Sun, May 04, 2014 at 04:02:38P
On Tue, May 06, 2014 at 10:03:19AM +0200, Carlo Caione wrote:
> On Tue, May 6, 2014 at 8:36 AM, Chen-Yu Tsai wrote:
> > Hi,
>
> Hi,
>
> > On Tue, May 6, 2014 at 6:55 AM, Maxime Ripard
> > wrote:
> >> On Sun, May 04, 2014 at 04:02:38PM +0200, Carlo Caione wrote:
> >>> The so called "system contr
On Tue, May 6, 2014 at 10:27 AM, Chen-Yu Tsai wrote:
> I came to the same conclusion, though I somehow forgot to update my tree
> on github. Here it is:
>
> https://github.com/wens/linux/tree/wip/sunxi-musb
>
> This also has the bit definitions:
>
>
> https://github.com/wens/linux/commit/3
On Tue, May 6, 2014 at 4:03 PM, Carlo Caione wrote:
> On Tue, May 6, 2014 at 8:36 AM, Chen-Yu Tsai wrote:
>> Hi,
>
> Hi,
>
>> On Tue, May 6, 2014 at 6:55 AM, Maxime Ripard
>> wrote:
>>> On Sun, May 04, 2014 at 04:02:38PM +0200, Carlo Caione wrote:
The so called "system controller" in Allwin
On Tue, May 6, 2014 at 8:36 AM, Chen-Yu Tsai wrote:
> Hi,
Hi,
> On Tue, May 6, 2014 at 6:55 AM, Maxime Ripard
> wrote:
>> On Sun, May 04, 2014 at 04:02:38PM +0200, Carlo Caione wrote:
>>> The so called "system controller" in Allwinner A20 and A31 SoCs is
>>> multi-purpose controller that tries
Hi,
On Tue, May 6, 2014 at 6:55 AM, Maxime Ripard
wrote:
> On Sun, May 04, 2014 at 04:02:38PM +0200, Carlo Caione wrote:
>> The so called "system controller" in Allwinner A20 and A31 SoCs is
>> multi-purpose controller that tries to add misc functionality to one
>> memory region.
>> In these SoCs
On Sun, May 04, 2014 at 04:02:38PM +0200, Carlo Caione wrote:
> The so called "system controller" in Allwinner A20 and A31 SoCs is
> multi-purpose controller that tries to add misc functionality to one
> memory region.
> In these SoCs it controls the internal SRAM partitioning but it also
> include
