Hi Maxime, Emilio,
On Tue, Sep 16, 2014 at 11:57 PM, Maxime Ripard
wrote:
> Hi Emilio,
>
> On Sat, Sep 13, 2014 at 11:43:46AM -0300, Emilio López wrote:
>> Hi,
>>
>> El 06/09/14 a las 07:47, Chen-Yu Tsai escibió:
>> >Some factor clocks, mostly PLLs, have an extra fixed divider just before
>> >the
On Wed, Sep 24, 2014 at 11:35:58PM +0800, Chen-Yu Tsai wrote:
> Hi Maxime, Emilio,
>
> On Tue, Sep 16, 2014 at 11:57 PM, Maxime Ripard
> wrote:
> > Hi Emilio,
> >
> > On Sat, Sep 13, 2014 at 11:43:46AM -0300, Emilio López wrote:
> >> Hi,
> >>
> >> El 06/09/14 a las 07:47, Chen-Yu Tsai escibió:
>
On Sat, Sep 27, 2014 at 3:07 PM, Maxime Ripard
wrote:
> On Wed, Sep 24, 2014 at 11:35:58PM +0800, Chen-Yu Tsai wrote:
>> Hi Maxime, Emilio,
>>
>> On Tue, Sep 16, 2014 at 11:57 PM, Maxime Ripard
>> wrote:
>> > Hi Emilio,
>> >
>> > On Sat, Sep 13, 2014 at 11:43:46AM -0300, Emilio López wrote:
>> >>
On Sat, Sep 06, 2014 at 06:47:22PM +0800, Chen-Yu Tsai wrote:
> Some factor clocks, mostly PLLs, have an extra fixed divider just before
> the clock output. Add an option to the factor clk driver config data to
> specify this divider.
>
> Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Tha
Hi,
El 06/09/14 a las 07:47, Chen-Yu Tsai escibió:
Some factor clocks, mostly PLLs, have an extra fixed divider just before
the clock output. Add an option to the factor clk driver config data to
specify this divider.
Signed-off-by: Chen-Yu Tsai
---
drivers/clk/sunxi/clk-factors.c | 3 +++
Hi Emilio,
On Sat, Sep 13, 2014 at 11:43:46AM -0300, Emilio López wrote:
> Hi,
>
> El 06/09/14 a las 07:47, Chen-Yu Tsai escibió:
> >Some factor clocks, mostly PLLs, have an extra fixed divider just before
> >the clock output. Add an option to the factor clk driver config data to
> >specify this
Hi,
On Sat, Sep 13, 2014 at 10:43 PM, Emilio López wrote:
> Hi,
>
> El 06/09/14 a las 07:47, Chen-Yu Tsai escibió:
>
>> Some factor clocks, mostly PLLs, have an extra fixed divider just before
>> the clock output. Add an option to the factor clk driver config data to
>> specify this divider.
>>
>