On Thu, May 08, 2014 at 11:40:59AM +0800, Chen-Yu Tsai wrote:
+ apb0_gates: apb0_gates_clk {
+ compatible =
allwinner,sun6i-a31-apb0-gates-clk;
+ #clock-cells = 1;
+ clocks = apb0;
On 08/05/2014 16:29, Maxime Ripard wrote:
On Thu, May 08, 2014 at 11:40:59AM +0800, Chen-Yu Tsai wrote:
+ apb0_gates: apb0_gates_clk {
+ compatible =
allwinner,sun6i-a31-apb0-gates-clk;
+ #clock-cells = 1;
+
On Wed, May 07, 2014 at 07:25:54PM +0200, Boris BREZILLON wrote:
Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
controller subdevices.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 39
On Thu, May 8, 2014 at 11:17 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
On Wed, May 07, 2014 at 07:25:54PM +0200, Boris BREZILLON wrote:
Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
controller subdevices.
Signed-off-by: Boris BREZILLON
