On Tue, 2021-06-15 at 12:06 +0100, Andre Przywara wrote: > The USB HCIs (and PHYs?) in Allwinner's newer generation SoCs (H616) > rely on the reset line of USB PHY 2 to be de-asserted, even when only > one of the other PHYs is actually in use. > > To make those ports work, we include this reset line in the HCIs' resets > property, which requires this line to be shareable. > > Change the call to allocate the reset line to mark it as shared, to > enable the other ports on those SoCs. > > Signed-off-by: Andre Przywara <andre.przyw...@arm.com>
Reviewed-by: Philipp Zabel <p.za...@pengutronix.de> regards Philipp -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/869864f6f85c1f1d3427bf6be32d703758bdad71.camel%40pengutronix.de.
