Hi. I checked a lot the last days and compared the register data with the datasheets. I compared also to the A83T datasheet which has these tablet LVDS display and the tcon should also work like A64. I compared the bsp source code with the mainline one. Here a summary.
I compared pinctrl to the original Bootloader one: * Data identically. All needed pins as lvds0 I compared ccu to the original Bootloader one: * PLL-Video0: only change is that the Lock Bit is not set in Bootloader * PLL-Mipi: only change is that the Lock Bit is not set in Bootloader * BUS-Gating: TCON0 -> On, DE -> On, MIPIDSI -> off I added MIPIDSI to the ccu dts-section to enable them. Which works but with no effect. Manually enabling with Busybox has no effect. Does The Bus-Gate Register will enable only the Bus clock to the module or also the other clocks like PLL-Video0 and PLL-MIPI? I compared tcon0 register: * Resolution is correct, backporch, frontporch are differ in 1-2 pixel. This should be ok for my understanding. * Interrupts are enabled like in source code (TCON0_Vb_Int_En and TCON0_Tri_Finish_Int_En) * FRM is off but the seed and table registers are filled with data. Should be not a problem * TCON-Control register: TCON-Start delay differs a bit * Data Clock Register: Clock is Enabled. Only 8-Hex and not F-Hex is used. A change in the kernel to F-Hex has no effect. A manual write with Busybox has no effect. Both shall work for my understanding. * LVDS-Panel-Interface-Register: Bootloader is using TCON0 clock and not MIPI PLL. The pin polarity is reverse. A change with busybox in this register has no effect. For me the mainline is correct to the datasheet. * Safe Period Register: Is used in Bootloader, not in Mainline driver * LVDS Ana0 Register: identically I see nothing that looks wrong. But I have no signal change on the pins which I don't understand. With X11VNC I can send the framebuffer to my desktop system which is working. Changes with fb-test tool are transmitted. So the framebuffer with memory is ok. I could understand that garbage is on the display because of wrong settings. But I have statical pins. Clocks are OK and identically in the register. The tcon is configured and LVDS is for my understanding only enabled with the LVDS-Panel-Interface and the Ana0 register. It looks that there is no clock, but they are enabled. Or the interrupt for the data is not generated and because of this is no transmission? I have also checked the LVDS code from the BSP which does nearly the same for LVDS. I would test if I can get the parallel TCON Interface to live to see that the tcon0 will send something. If this is working then LVDS is only a change in the output mode. Any other ideas about why I have only statical signals? Could be the tcon to mixer interface wrong that they will get no data? John-Eric -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/MN2PR07MB7087C78BA22C1BF051594FE2AB1F0%40MN2PR07MB7087.namprd07.prod.outlook.com. For more options, visit https://groups.google.com/d/optout.
