Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

On Thursday 07 January 2016 13:19:44 Jon Hunter wrote: > > Adding Arnd. > > Hmmm ... well apparently stdout-path does not work for tegra and in > order to make this work I had to do the following ... > > > [PATCH] serial: 8250: of: Add earlycon support for Tegra > > Currently, early console

Re: next boot: 564 boots: 59 failed, 448 passed with 57 offline (next-20160107)

On Thu, Jan 07, 2016 at 03:59:58PM +, Mark Brown wrote: > On Thu, Jan 07, 2016 at 07:41:52AM -0800, kernelci.org bot wrote: > > > Tree: next > > Branch: local/master > > Git Describe: next-20160107 > > Git Commit: 0f023a298a7d2a8e99c54913f7277b3c08c1f5c9 > > Git URL:

Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

On Thu, Jan 7, 2016 at 10:53 AM, Jon Hunter wrote: > > On 07/01/16 14:11, Arnd Bergmann wrote: >> On Thursday 07 January 2016 13:19:44 Jon Hunter wrote: [...] > Ok so something like this ... > > diff --git a/drivers/tty/serial/8250/8250_early.c >

[PATCH v3 07/12] mmc: sdhci-of-esdhc: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-esdhc driver to this allocation. Signed-off-by: Jisheng Zhang

[PATCH v3 08/12] mmc: sdhci-pxav3: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-pxav3 to this allocation. Signed-off-by: Jisheng Zhang Acked-by: Arnd

[PATCH v3 04/12] mmc: sdhci-msm: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-msm to this allocation. Signed-off-by: Jisheng Zhang Acked-by: Arnd

Re: [PATCH v2 06/12] mmc: sdhci-of-at91: use sdhci_pltfm_init for private allocation

Dear Ulf, On Wed, 6 Jan 2016 17:22:48 +0800 Jisheng Zhang wrote: > Dear Ludovic, > > On Wed, 6 Jan 2016 10:02:15 +0100 Ludovic Desroches wrote: > > > Hi Jisheng, > > > > Thanks for your patch but it needs to be updated since it breaks this > > driver. > > > > - struct sdhci_at91_priv

[PATCH v3 03/12] mmc: sdhci-msm: factorise sdhci_msm_pdata outisde of sdhci_msm_host

There's no need to allocate one sdhci_msm_pdata for each sdhci_msm_host. This patch removes the sdhci_msm_pdata member from sdhci_msm_host and uses one static global sdhci_msm_pdata for all sdhci msm hosts. It also marks sdhci_msm_ops as const. Signed-off-by: Jisheng Zhang

[PATCH v3 05/12] mmc: sdhci-of-arasan: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-arasan driver to this allocation. Signed-off-by: Jisheng Zhang

[PATCH v3 00/12] mmc: use sdhci_pltfm_init for private allocation and clean up

These patches are to complete the TODOs in Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register"), I.E: - todo: migrate clients to using allocation this way - todo: remove priv variable once migration is complete Since v2: - based on mmc next tree and remove all priv usage

[PATCH v3 06/12] mmc: sdhci-of-at91: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-at91 driver to this allocation. Signed-off-by: Jisheng Zhang

Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

Hi, On Wed, Jan 06, 2016 at 09:40:22AM +, Jon Hunter wrote: > Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based > upon Tegra210 SoC with 3 GiB of LPDDR4 RAM. > > Signed-off-by: Jon Hunter > --- > arch/arm64/boot/dts/nvidia/Makefile | 1

Re: [PATCH v2 06/12] mmc: sdhci-of-at91: use sdhci_pltfm_init for private allocation

Hi Jisheng, Thanks for your patch but it needs to be updated since it breaks this driver. - struct sdhci_at91_priv *priv = pltfm_host->priv; + struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); is missing in sdhci_at91_runtime_suspend and sdhci_at91_runtime_resume

Re: [PATCH v2 06/12] mmc: sdhci-of-at91: use sdhci_pltfm_init for private allocation

Dear Ludovic, On Wed, 6 Jan 2016 10:02:15 +0100 Ludovic Desroches wrote: > Hi Jisheng, > > Thanks for your patch but it needs to be updated since it breaks this > driver. > > - struct sdhci_at91_priv *priv = pltfm_host->priv; > + struct sdhci_at91_priv *priv =

[PATCH v3 01/12] mmc: sdhci-bcm2835: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-bcm2835 to this allocation. Signed-off-by: Jisheng Zhang Acked-by: Arnd

[PATCH v3 02/12] mmc: sdhci-esdhc-imx: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci esdhc-imx driver to this allocation. Signed-off-by: Jisheng Zhang

[PATCH v3 09/12] mmc: sdhci-st: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-st to this allocation. Signed-off-by: Jisheng Zhang Acked-by: Arnd

[PATCH] ARM64: tegra: Add support for Google Pixel C

Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based upon Tegra210 SoC with 3 GiB of LPDDR4 RAM. Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/Makefile | 1 + arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 42

Re: [PATCH v2 06/12] mmc: sdhci-of-at91: use sdhci_pltfm_init for private allocation

On Wed, Jan 06, 2016 at 05:22:48PM +0800, Jisheng Zhang wrote: > Dear Ludovic, > > On Wed, 6 Jan 2016 10:02:15 +0100 Ludovic Desroches wrote: > > > Hi Jisheng, > > > > Thanks for your patch but it needs to be updated since it breaks this > > driver. > > > > - struct sdhci_at91_priv

[PATCH v3 10/12] mmc: sdhci-tegra: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-tegra to this allocation. Signed-off-by: Jisheng Zhang Acked-by: Arnd

[PATCH v3 11/12] mmc: sdhci-pxav2: remove unnecessary assignment of pltfm_host->priv

The sdhci_pltfm_init() function has initialized the priv member as NULL, so there's no need to do it again. Signed-off-by: Jisheng Zhang Acked-by: Arnd Bergmann --- drivers/mmc/host/sdhci-pxav2.c | 1 - 1 file changed, 1 deletion(-) diff --git

[PATCH v3 12/12] mmc: sdhci-pltfm: remove priv variable from sdhci_pltfm_host

Now all clients migration to use sdhci_pltfm_init for private allocation is done and there's no users of the priv variable, so we can remove it from the sdhci_pltfm_host structure. Signed-off-by: Jisheng Zhang Acked-by: Arnd Bergmann ---

Re: [PATCH v3 06/12] mmc: sdhci-of-at91: use sdhci_pltfm_init for private allocation

On Wed, Jan 06, 2016 at 06:31:37PM +0800, Jisheng Zhang wrote: > Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") > allows users of sdhci_pltfm to allocate private space in calls to > sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the > sdhci-of-at91 driver to

Re: [PATCH] ARM64: tegra: Add support for Google Pixel C

On 06/01/16 09:46, Mark Rutland wrote: > Hi, > > On Wed, Jan 06, 2016 at 09:40:22AM +, Jon Hunter wrote: >> Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based >> upon Tegra210 SoC with 3 GiB of LPDDR4 RAM. >> >> Signed-off-by: Jon Hunter >> --- >>

Re: [PATCH v3] PCI: hosts: mark pcie/pci (msi) irq cascade handler as IRQF_NO_THREAD

Hi Grygorii, On Thu, Dec 10, 2015 at 09:18:20PM +0200, Grygorii Strashko wrote: > On -RT and if kernel is booting with "threadirqs" cmd line parameter > pcie/pci (msi) irq cascade handlers (like dra7xx_pcie_msi_irq_handler()) > will be forced threaded and, as result, will generate warnings like:

[PATCH v2 08/12] mmc: sdhci-pxav3: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-pxav3 to this allocation. Signed-off-by: Jisheng Zhang Acked-by: Arnd

[PATCH v2 09/12] mmc: sdhci-st: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-st to this allocation. Signed-off-by: Jisheng Zhang Acked-by: Arnd

[PATCH v2 10/12] mmc: sdhci-tegra: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-tegra to this allocation. Signed-off-by: Jisheng Zhang Acked-by: Arnd

[PATCH v2 12/12] mmc: sdhci-pltfm: remove priv variable from sdhci_pltfm_host

Now all clients migration to use sdhci_pltfm_init for private allocation is done and there's no users of the priv variable, so we can remove it from the sdhci_pltfm_host structure. Signed-off-by: Jisheng Zhang Acked-by: Arnd Bergmann ---

[PATCH v2 07/12] mmc: sdhci-of-esdhc: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-esdhc driver to this allocation. Signed-off-by: Jisheng Zhang

[PATCH v2 02/12] mmc: sdhci-esdhc-imx: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci esdhc-imx driver to this allocation. Signed-off-by: Jisheng Zhang

Re: [PATCH 03/11] mmc: sdhci-msm: use sdhci_pltfm_init for private allocation

On Tue, 5 Jan 2016 20:47:37 +0800 kbuild test robot wrote: > Hi Jisheng, > > [auto build test WARNING on v4.4-rc8] > [also build test WARNING on next-20160105] > [cannot apply to ulf.hansson-mmc/next] > [if your patch is applied to the wrong git tree, please drop us a note to > help improving

[PATCH v2 01/12] mmc: sdhci-bcm2835: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-bcm2835 to this allocation. Signed-off-by: Jisheng Zhang Acked-by: Arnd

[PATCH v2 04/12] mmc: sdhci-msm: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-msm to this allocation. Signed-off-by: Jisheng Zhang Acked-by: Arnd

[PATCH v2 06/12] mmc: sdhci-of-at91: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-at91 driver to this allocation. Signed-off-by: Jisheng Zhang

[PATCH v2 00/12] mmc: use sdhci_pltfm_init for private allocation and clean up

These patches are to complete the TODOs in Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register"), I.E: - todo: migrate clients to using allocation this way - todo: remove priv variable once migration is complete Since v1: - add new patch03 to factorise sdhci_msm_pdata outisde

[PATCH v2 03/12] mmc: sdhci-msm: factorise sdhci_msm_pdata outisde of sdhci_msm_host

There's no need to allocate one sdhci_msm_pdata for each sdhci_msm_host. This patch removes the sdhci_msm_pdata member from sdhci_msm_host and uses one static global sdhci_msm_pdata for all sdhci msm hosts. It also marks sdhci_msm_ops as const. Signed-off-by: Jisheng Zhang

[PATCH v2 05/12] mmc: sdhci-of-arasan: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-arasan driver to this allocation. Signed-off-by: Jisheng Zhang

[PATCH 04/11] mmc: sdhci-of-arasan: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-arasan driver to this allocation. Signed-off-by: Jisheng Zhang

[PATCH 11/11] mmc: sdhci-pltfm: remove priv variable from sdhci_pltfm_host

Now all clients migration to use sdhci_pltfm_init for private allocation is done and there's no users of the priv variable, so we can remove it from the sdhci_pltfm_host structure. Signed-off-by: Jisheng Zhang --- drivers/mmc/host/sdhci-pltfm.h | 1 - 1 file changed, 1

[PATCH 06/11] mmc: sdhci-of-esdhc: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-esdhc driver to this allocation. Signed-off-by: Jisheng Zhang

[PATCH 02/11] mmc: sdhci-esdhc-imx: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci esdhc-imx driver to this allocation. Signed-off-by: Jisheng Zhang

[PATCH 07/11] mmc: sdhci-pxav3: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-pxav3 to this allocation. Signed-off-by: Jisheng Zhang ---

[PATCH 10/11] mmc: sdhci-pxav2: remove unnecessary assignment of pltfm_host->priv

The sdhci_pltfm_init() function has initialized the priv member as NULL, so there's no need to do it again. Signed-off-by: Jisheng Zhang --- drivers/mmc/host/sdhci-pxav2.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c

[PATCH 01/11] mmc: sdhci-bcm2835: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-bcm2835 to this allocation. Signed-off-by: Jisheng Zhang ---

[PATCH 09/11] mmc: sdhci-tegra: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-tegra to this allocation. Signed-off-by: Jisheng Zhang ---

[PATCH 05/11] mmc: sdhci-of-at91: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-at91 driver to this allocation. Signed-off-by: Jisheng Zhang ---

[PATCH 08/11] mmc: sdhci-st: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-st to this allocation. Signed-off-by: Jisheng Zhang ---

[PATCH 03/11] mmc: sdhci-msm: use sdhci_pltfm_init for private allocation

Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-msm to this allocation. Signed-off-by: Jisheng Zhang ---

[PATCH 00/11] mmc: use sdhci_pltfm_init for private allocation and clean up

These patches are to complete the TODO in Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register"), I.E: - todo: migrate clients to using allocation this way - todo: remove priv variable once migration is complete Jisheng Zhang (11): mmc: sdhci-bcm2835: use sdhci_pltfm_init for

Re: [PATCH 00/11] mmc: use sdhci_pltfm_init for private allocation and clean up

On Tuesday 05 January 2016 18:51:28 Jisheng Zhang wrote: > These patches are to complete the TODO in Commit 0e748234293f ("mmc: > sdhci: Add size for caller in init+register"), I.E: > > - todo: migrate clients to using allocation this way > - todo: remove priv variable once migration is complete

Re: [PATCH 03/11] mmc: sdhci-msm: use sdhci_pltfm_init for private allocation

Hi Jisheng, [auto build test WARNING on v4.4-rc8] [also build test WARNING on next-20160105] [cannot apply to ulf.hansson-mmc/next] [if your patch is applied to the wrong git tree, please drop us a note to help improving the system] url:

[PATCH] Remove CONFIG_CRYPTO_DEV_TEGRA_AES from multi_v7_defconfig

The related driver was removed by commit 645af2e4 on Feb 2014 --- arch/arm/configs/multi_v7_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 69a22fd..ae7e769 100644 ---

Re: [GIT PULL 1/5] clk: tegra: Changes for v4.5-rc1

Quoting Thierry Reding (2015-12-17 04:50:35) > Hi Mike, Stephen, > > The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec: > > Linux 4.4-rc1 (2015-11-15 17:00:27 -0800) > > are available in the git repository at: > >

Tegra baseline test results for v4.4-rc7

Here are some basic Tegra test results for Linux v4.4-rc7. Logs and other details at: https://nvtb.github.io//linux/test_v4.4-rc7/20151227183102/ Test summary Build: zImage: Pass: ( 2/ 2): multi_v7_defconfig, tegra_defconfig Build: Image: Pass: ( 1/ 1): defconfig

Tegra baseline test results for v4.4-rc8

Here are some basic Tegra test results for Linux v4.4-rc8. Logs and other details at: https://nvtb.github.io//linux/test_v4.4-rc8/20160104044344/ Test summary Build: zImage: Pass: ( 2/ 2): multi_v7_defconfig, tegra_defconfig Build: Image: Pass: ( 1/ 1): defconfig

Re: [PATCH] mmc: tegra: don't enable UHS modes on Tegra210

On Wed, Dec 30, 2015 at 04:49:09PM +0100, Lucas Stach wrote: > Tegra210 needs a different tuning sequence than Tegra30+. Disable > UHS modes until support for this is properly added. > > Signed-off-by: Lucas Stach > --- > Ulf, > this is a follow on patch to my Tegra UHS-I

Charity Donation

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Re: [GIT PULL 3/5] ARM: tegra: Core SoC changes for v4.5-rc1

On Tue, Dec 22, 2015 at 11:54:46AM -0800, Olof Johansson wrote: > On Thu, Dec 17, 2015 at 01:50:37PM +0100, Thierry Reding wrote: > > Hi ARM SoC maintainers, > > > > The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec: > > > > Linux 4.4-rc1 (2015-11-15 17:00:27 -0800) >

Re: [GIT PULL 4/5] ARM: tegra: Devicetree changes for v4.5-rc1

On Tue, Dec 22, 2015 at 11:55:20AM -0800, Olof Johansson wrote: > On Thu, Dec 17, 2015 at 01:50:38PM +0100, Thierry Reding wrote: > > Hi ARM SoC maintainers, > > > > The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec: > > > > Linux 4.4-rc1 (2015-11-15 17:00:27 -0800) >

[PATCH] mmc: tegra: don't enable UHS modes on Tegra210

Tegra210 needs a different tuning sequence than Tegra30+. Disable UHS modes until support for this is properly added. Signed-off-by: Lucas Stach --- Ulf, this is a follow on patch to my Tegra UHS-I series. After reading the Tegra210 TRM I realized that the currently implemented

Re: [GIT PULL 2/5] memory: tegra: Changes for v4.5-rc1

On Tue, Dec 22, 2015 at 11:53:18AM -0800, Olof Johansson wrote: > On Thu, Dec 17, 2015 at 01:50:36PM +0100, Thierry Reding wrote: > > Hi ARM SoC maintainers, > > > > The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec: > > > > Linux 4.4-rc1 (2015-11-15 17:00:27 -0800) >

Charity Donation

Hi, My name is Jeffrey Skoll, a philanthropist and the founder of one of the largest private foundations in the world. I believe strongly in ‘giving while living.’ I had one idea that never changed in my mind — that you should use your wealth to help people and I have decided to secretly give

Re: [PATCH v2 0/5] Tegra SDHCI UHS-I support

On 22 December 2015 at 19:40, Lucas Stach wrote: > Hi all, > > this series implements UHS-I signaling for the Tegra SDHCI host, > which mainly means putting a proper tuning sequence in place. > > I've tested this on Jetson TK1 and got the following speed results, > where mmcblk0

Donation/Charity

Hi, My name is Jeffrey Skoll, a philanthropist and the founder of one of the largest private foundations in the world. I believe strongly in ‘giving while living.’ I had one idea that never changed in my mind — that you should use your wealth to help people and I have decided to secretly give

Re: [PATCH 13/19] ARM: dts: tegra: replace legacy *,wakeup property with wakeup-source

On Wed, Oct 21, 2015 at 11:10 AM, Sudeep Holla wrote: > Though the keyboard and other driver will continue to support the legacy > "gpio-key,wakeup", "nvidia,wakeup-source" boolean property to enable the > wakeup source, "wakeup-source" is the new standard binding. > > This

Re: [PATCH] ARM: tegra: Fix suspend hang on Tegra124 Chromebooks

On 22/12/15 23:42, Olof Johansson wrote: > On Tue, Dec 08, 2015 at 10:26:49AM +, Jon Hunter wrote: >> Enabling CPUFreq support for Tegra124 Chromebooks is causing the Tegra124 >> to hang when resuming from suspend. >> >> When CPUFreq is enabled, the CPU clock is changed from the PLLX clock to

[PATCH v2 2/5] mmc: tegra: disable SPI_MODE_CLKEN

The Tegra30 and up TRM states that this bit should always be programmed to 0 by driver software. Signed-off-by: Lucas Stach --- drivers/mmc/host/sdhci-tegra.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c

[PATCH v2 4/5] mmc: tegra: enable UHS-I modes

Keep the quirk bits, as Tegra30 and Tegra114 host have different levels of support for UHS-I modes and so need different spare bits to be set, but change the logic to be positive. Signed-off-by: Lucas Stach --- drivers/mmc/host/sdhci-tegra.c | 40

Re: [GIT PULL 4/5] ARM: tegra: Devicetree changes for v4.5-rc1

On Thu, Dec 17, 2015 at 01:50:38PM +0100, Thierry Reding wrote: > Hi ARM SoC maintainers, > > The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec: > > Linux 4.4-rc1 (2015-11-15 17:00:27 -0800) > > are available in the git repository at: > >

Re: [GIT PULL 2/5] memory: tegra: Changes for v4.5-rc1

On Thu, Dec 17, 2015 at 01:50:36PM +0100, Thierry Reding wrote: > Hi ARM SoC maintainers, > > The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec: > > Linux 4.4-rc1 (2015-11-15 17:00:27 -0800) > > are available in the git repository at: > >

Re: [GIT PULL 5/5] ARM: tegra: Default configuration updates for v4.5-rc1

On Thu, Dec 17, 2015 at 01:50:39PM +0100, Thierry Reding wrote: > Hi ARM SoC maintainers, > > The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec: > > Linux 4.4-rc1 (2015-11-15 17:00:27 -0800) > > are available in the git repository at: > >

[PATCH v2 1/5] mmc: tegra: implement module external clock change

Allow the the driver to change the clock supplied from the CAR directly, minimizing the need to divide the clock inside the SDMMC module itself. This allows for higher clock speeds than the default 48MHz supplied to the module and is a prerequisite to support DDR signaling modes, where the Tegra

[PATCH v2 5/5] mmc: tegra: use correct accessor for misc ctrl register

The misc control register is 32bit wide, the used readw/writew accessors only mainipulate the low 16bit of this register. It currently doesn't matter as all the bit changed are located in the lower half, but together with the u32 variable used to hold the contents of the register it is seriously

[PATCH v2 0/5] Tegra SDHCI UHS-I support

Hi all, this series implements UHS-I signaling for the Tegra SDHCI host, which mainly means putting a proper tuning sequence in place. I've tested this on Jetson TK1 and got the following speed results, where mmcblk0 is the on-board eMMC and mmcblk1 is a micro SDXC card: Without series applied:

[PATCH v2 3/5] mmc: tegra: implement UHS tuning

This implements the UHS tuning sequence in a similar way to the one contained in the TRM. It deviates in the way how to check if the tap value is passing, by using the common Linux MMC function, which does not only check for data CRC errors, but also if the received block pattern is correct.

Re: [PATCH] ARM: tegra: Fix suspend hang on Tegra124 Chromebooks

On Tue, Dec 08, 2015 at 10:26:49AM +, Jon Hunter wrote: > Enabling CPUFreq support for Tegra124 Chromebooks is causing the Tegra124 > to hang when resuming from suspend. > > When CPUFreq is enabled, the CPU clock is changed from the PLLX clock to > the DFLL clock during kernel boot. When

Re: [RFC PATCH V2 1/8] irqdomain: Ensure type settings match for an existing mapping

On Fri, Dec 18, 2015 at 11:10 AM, Jon Hunter wrote: > On 17/12/15 13:16, Linus Walleij wrote: >> On Thu, Dec 17, 2015 at 11:48 AM, Jon Hunter wrote: >>> + } else { >>> + virq = irq_domain_alloc_descs(-1, 1, hwirq,

Re: [RFC PATCH V2 8/8] irqchip/gic: Add support for tegra AGIC interrupt controller

On Fri, Dec 18, 2015 at 11:44 AM, Jon Hunter wrote: > On 17/12/15 13:32, Linus Walleij wrote: >> On Thu, Dec 17, 2015 at 11:48 AM, Jon Hunter wrote: >> >>> Add a driver for the Tegra-AGIC interrupt controller which is compatible >>> with the ARM

Re: [RFC PATCH V2 1/8] irqdomain: Ensure type settings match for an existing mapping

On Tue, Dec 22, 2015 at 10:58 AM, Linus Walleij wrote: > On Fri, Dec 18, 2015 at 11:10 AM, Jon Hunter wrote: >> On 17/12/15 13:16, Linus Walleij wrote: >>> On Thu, Dec 17, 2015 at 11:48 AM, Jon Hunter wrote: +

Re: [RFC PATCH V2 2/8] irqdomain: Don't set type when mapping an IRQ

On 12/17/2015 12:48 PM, Jon Hunter wrote: > Some IRQ chips, such as GPIO controllers or secondary level interrupt > controllers, may require require additional runtime power management > control to ensure they are accessible. For such IRQ chips, it makes sense > to enable the IRQ chip when

Re: [RFC PATCH V2 1/8] irqdomain: Ensure type settings match for an existing mapping

On 22/12/15 10:00, Linus Walleij wrote: > On Tue, Dec 22, 2015 at 10:58 AM, Linus Walleij > wrote: >> On Fri, Dec 18, 2015 at 11:10 AM, Jon Hunter wrote: >>> On 17/12/15 13:16, Linus Walleij wrote: On Thu, Dec 17, 2015 at 11:48 AM, Jon Hunter

Re: [RFC PATCH V2 1/8] irqdomain: Ensure type settings match for an existing mapping

On 12/22/2015 12:00 PM, Linus Walleij wrote: > On Tue, Dec 22, 2015 at 10:58 AM, Linus Walleij > wrote: >> On Fri, Dec 18, 2015 at 11:10 AM, Jon Hunter wrote: >>> On 17/12/15 13:16, Linus Walleij wrote: On Thu, Dec 17, 2015 at 11:48 AM, Jon

Re: [RFC PATCH V2 2/8] irqdomain: Don't set type when mapping an IRQ

On 22/12/15 11:18, Grygorii Strashko wrote: > On 12/17/2015 12:48 PM, Jon Hunter wrote: >> Some IRQ chips, such as GPIO controllers or secondary level interrupt >> controllers, may require require additional runtime power management >> control to ensure they are accessible. For such IRQ chips, it

Re: [PATCH 1/5] pinctrl-tegra: add missing of_node_put

On Mon, Dec 21, 2015 at 5:39 PM, Julia Lawall wrote: > for_each_child_of_node performs an of_node_get on each iteration, so a > return from the loop requires an of_node_put. > > A simplified version of the semantic patch that fixes this problem is as > follows

Re: [GIT PULL 3/5] ARM: tegra: Core SoC changes for v4.5-rc1

On Thu, Dec 17, 2015 at 01:50:37PM +0100, Thierry Reding wrote: > Hi ARM SoC maintainers, > > The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec: > > Linux 4.4-rc1 (2015-11-15 17:00:27 -0800) > > are available in the git repository at: > >

[PATCH] ARM64: tegra: Add chosen node for tegra132 norrin

The NVIDIA bootloader, nvtboot, expects the "chosen" node to be present in the device-tree blob and it is not then it fails to boot the kernel. Add the chosen node so we can boot the kernel on tegra132 norrin with the nvtboot bootloader. Signed-off-by: Jon Hunter ---

Tegra baseline test results for v4.4-rc6

Here are some basic Tegra test results for Linux v4.4-rc6. Logs and other details at: https://nvtb.github.io//linux/test_v4.4-rc6/20151220163104/ Test summary Build: zImage: Pass: ( 2/ 2): multi_v7_defconfig, tegra_defconfig Build: Image: Pass: ( 1/ 1): defconfig

Re: [PATCH] ARM: tegra: Fix suspend hang on Tegra124 Chromebooks

Ping? On 08/12/15 10:26, Jon Hunter wrote: > Enabling CPUFreq support for Tegra124 Chromebooks is causing the Tegra124 > to hang when resuming from suspend. > > When CPUFreq is enabled, the CPU clock is changed from the PLLX clock to > the DFLL clock during kernel boot. When resuming from

Re: [PATCH 4/5] mmc: tegra: enable UHS-I modes

On 19 December 2015 at 20:16, Lucas Stach wrote: > Keep the quirk bits, as Tegra30 and Tegra114 host have different levels > of support for UHS-I modes and so need different spare bits to be set, > but change the logic to be positive. > > Signed-off-by: Lucas Stach

[PATCH 1/2] clk: tegra: Fix warning caused by pll_u failing to lock

If the pll_u is not configured by the bootloader, then on kernel boot the following warning is seen: clk_pll_wait_for_lock: Timed out waiting for pll pll_u_vco lock tegra_init_from_table: Failed to enable pll_u_out1 [ cut here ] WARNING: at drivers/clk/tegra/clk.c:269

[PATCH 2/2] clk: tegra: Use definition for pll_u override bit

The definition, PLLU_BASE_OVERRIDE, for the pll_u OVERRIDE bit is defined but not used and when the OVERRIDE bit is cleared in tegra210_pll_init() the code directly uses the bit number. Therefore, use the definition, PLLU_BASE_OVERRIDE when clearing the OVERRIDE bit. Signed-off-by: Jon Hunter

Re: [PATCH 1/2] clk: tegra: Fix warning caused by pll_u failing to lock

On 12/21/2015 7:56 AM, Jon Hunter wrote: > If the pll_u is not configured by the bootloader, then on kernel boot the > following warning is seen: > > clk_pll_wait_for_lock: Timed out waiting for pll pll_u_vco lock > tegra_init_from_table: Failed to enable pll_u_out1 > [ cut here

Re: [PATCH 2/2] clk: tegra: Use definition for pll_u override bit

On 12/21/2015 7:56 AM, Jon Hunter wrote: > The definition, PLLU_BASE_OVERRIDE, for the pll_u OVERRIDE bit is defined > but not used and when the OVERRIDE bit is cleared in tegra210_pll_init() > the code directly uses the bit number. Therefore, use the definition, > PLLU_BASE_OVERRIDE when clearing

[PATCH 1/5] pinctrl-tegra: add missing of_node_put

for_each_child_of_node performs an of_node_get on each iteration, so a return from the loop requires an of_node_put. A simplified version of the semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // @@ local idexpression n; expression e,e1; @@

[PATCH 3/5] mmc: tegra: implement UHS tuning

This implements the UHS tuning sequence in a similar way to the one contained in the TRM. It deviates in the way how to check if the tap value is passing, by using the common Linux MMC function, which does not only check for data CRC errors, but also if the received block pattern is correct.

[PATCH 4/5] mmc: tegra: enable UHS-I modes

Keep the quirk bits, as Tegra30 and Tegra114 host have different levels of support for UHS-I modes and so need different spare bits to be set, but change the logic to be positive. Signed-off-by: Lucas Stach --- drivers/mmc/host/sdhci-tegra.c | 34

[PATCH 2/5] mmc: tegra: disable SPI_MODE_CLKEN

The Tegra30 and up TRM states that this bit should always be programmed to 0 by driver software. Signed-off-by: Lucas Stach --- drivers/mmc/host/sdhci-tegra.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c

[PATCH 1/5] mmc: tegra: implement module external clock change

Allow the the driver to change the clock supplied from the CAR directly, minimizing the need to divide the clock inside the SDMMC module itself. This allows for higher clock speeds than the default 48MHz supplied to the module and is a prerequisite to support DDR signaling modes, where the Tegra

[PATCH 5/5] mmc: tegra: use correct accessor for misc ctrl register

The misc control register is 32bit wide, the used readw/writew accessors only mainipulate the low 16bit of this register. It currently doesn't matter as all the bit changed are located in the lower half, but together with the u32 variable used to hold the contents of the register it is seriously

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