On Tue, Sep 20, 2016 at 5:56 PM, Mathias Nyman
wrote:
> Quick Googling shows that that TI TUSB 73x0 USB3.0 xHCI host has an issue
> with halting.
>
> Errata says host needs 125us to 1ms between the last control transfer and
> clearing the run/stop bit. (halting the
On Tue, Oct 25, 2016 at 04:26:26PM +0530, Sriram Dash wrote:
> For xhci-hcd platform device, all the DMA parameters are not configured
> properly, notably dma ops for dwc3 devices.
>
> The idea here is that you pass in the parent of_node along with the child
> device pointer, so it would behave
The following changes since commit b76032396d7958f006bccf5fb2535beb5526837c:
usb: renesas_usbhs: add wait after initialization for R-Car Gen3 (2016-10-24
14:35:46 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git/
On Tue, Oct 18, 2016 at 02:35:38AM +0200, Rafael J. Wysocki wrote:
> On Monday, October 17, 2016 09:30:59 AM Peter Chen wrote:
> > On Fri, Oct 14, 2016 at 02:09:31PM +0200, Rafael J. Wysocki wrote:
> > > On Friday, October 14, 2016 10:59:47 AM Peter Chen wrote:
> > > > Hi all,
> > > >
> > > >
Hi,
On 10/25/2016 05:32 PM, Jani Nikula wrote:
> On Tue, 25 Oct 2016, Lu Baolu wrote:
>> Add Documentation/usb/usb3-debug-port.txt. This document includes
>> the user guide for USB3 debug port.
> It's in reStructuredText, please name it .rst.
Sure.
Best regards,
Lu
On 10/25/2016 2:56 PM, John Stultz wrote:
> On Tue, Oct 25, 2016 at 2:29 PM, John Youn wrote:
>> On 10/19/2016 11:00 PM, John Stultz wrote:
>>> I had seen some odd behavior with HiKey's usb-gadget interface
>>> that I finally seemed to have chased down. Basically every
On Tue, Oct 25, 2016 at 2:29 PM, John Youn wrote:
> On 10/19/2016 11:00 PM, John Stultz wrote:
>> I had seen some odd behavior with HiKey's usb-gadget interface
>> that I finally seemed to have chased down. Basically every other
>> time I pluged in the OTG port, the gadget
Hi David,
I know this is a pretty old thread. I tried searching for the LKML
etiquette on something like this and came up empty. If I should start
a new thread, let me know.
After what I learned from the last thread, I dropped the idea of using
the device controller from the Dell tablet I had. A
On 10/19/2016 11:00 PM, John Stultz wrote:
> I had seen some odd behavior with HiKey's usb-gadget interface
> that I finally seemed to have chased down. Basically every other
> time I pluged in the OTG port, the gadget interface would
> properly initialize. The other times, I'd get a big WARN_ON
>
Felipe,
On Tue, Oct 25, 2016 at 08:57:26AM -0500, Bin Liu wrote:
> On Tue, Oct 25, 2016 at 04:44:13PM +0300, Felipe Balbi wrote:
>
> [snip]
>
> > > Just reviewed this patch, it seems to be the regression. But SS should
> > > not generate ID pin event either, right? SS uses far-end termination,
On 10/25/2016 7:15 AM, Randy Li wrote:
> I forget to add a dummy function in case the CONFIG_GENERIC_PHY
> is disabled.
>
> Signed-off-by: Randy Li
Fixes: cac18ecb6f44 ("phy: Add reset callback")
Tested-by: John Youn
Hi Kishon,
Can you take this for
On Tuesday, October 25, 2016 4:26:27 PM CEST Sriram Dash wrote:
> Do not require dma_set_coherent_mask for hcd
>
> Signed-off-by: Arnd Bergmann
Aside from the comments I had for patch 3, you are doing two
different things here:
> diff --git a/drivers/usb/dwc3/dwc3-st.c
On Tuesday, October 25, 2016 4:26:28 PM CEST Sriram Dash wrote:
> Do not use dma_coerce_mask_and_coherent for hcd.
>
> Signed-off-by: Arnd Bergmann
The patch is good, but please follow the usual rules for submitting
someone else's patch:
- As the first line, have "From: Arnd
This is a workaround for STAR 9000961433 which affects only version
3.00a of the DWC_usb3 core. This prevents the controller interrupt from
being masked while handling events. Enabling interrupt moderation allows
us to work around this issue because once the GEVNTCOUNT.count is
written the IRQ is
Implement interrupt moderation which allows the interrupt rate to be
throttled. To enable this feature the dwc->imod_interval must be set to
1 or greater. This value specifies the minimum inter-interrupt interval,
in 250 ns increments. A value of 0 disables interrupt moderation.
This applies for
Add a function to check properties and call it from probe. This will
allow us to add check code without bloating the probe function. This
needs to be done after dwc3_get_properties() and dwc3_core_init() so
that all the properties and hardware configs are available.
Signed-off-by: John Youn
Add a helper function to check if we are running on a DWC_usb3 core.
Signed-off-by: John Youn
---
drivers/usb/dwc3/core.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 180239f..4f15c23 100644
---
Since we are saving the event count and handling the events in the
threaded interrupt handler, we can write and clear out the eventcount in
the hard interrupt handler itself.
This behavior will be required for IP 3.00a cores that need to use
interrupt moderation as a workaround for an RTL issue
This patch series implements interrupt moderation and also uses it in
implementing a workaround for STAR 9000961433.
John Youn (6):
usb: dwc3: Add a check for the DWC_usb3 core
usb: dwc3: Add a function to check properties
Documentation: devicetree: dwc3: Add interrupt moderation
usb:
Add interrupt moderation interval binding for dwc3.
Signed-off-by: John Youn
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
On 10/25/2016 09:39 AM, Alexandre Bailon wrote:
This adds the device tree node for the usb otg
controller present in the da850 family of SoC's.
This also enables the otg usb controller for the lcdk board.
Signed-off-by: Alexandre Bailon
---
On 10/25/2016 08:52 AM, Alexandre Bailon wrote:
If we configure the da8xx OTG phy in OTG mode, neither device or host
mode will work. That is because the PHY is not able to detect and notify
the driver that value of ID pin changed.
To work despite this hardware limitation, the da8xx glue
On 10/25/2016 08:52 AM, Alexandre Bailon wrote:
The first attempt to read a register may fail because the clock may not
be enabled, and then the probe of musb driver will fail.
Call clk_prepare_enable() before the first register read.
Signed-off-by: Alexandre Bailon
---
This suppresses printing the error message "failed to get phy" in the
kernel log when the error is -EPROBE_DEFER. This prevents usless noise
in the kernel log.
Signed-off-by: David Lechner
---
drivers/usb/musb/da8xx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Hello.
On 10/25/2016 05:39 PM, Alexandre Bailon wrote:
From: Petr Kulhavy
This adds DT support for TI DA8xx/OMAP-L1x/AM17xx/AM18xx MUSB driver
Signed-off-by: Petr Kulhavy
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/da8xx.c |
On Tue, Oct 25, 2016 at 6:53 PM, David Lechner wrote:
> On 10/25/2016 03:24 AM, Axel Haslam wrote:
>>
>> On Tue, Oct 25, 2016 at 3:39 AM, David Lechner
>> wrote:
>>>
>>> On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
From: Axel
On 10/25/2016 03:24 AM, Axel Haslam wrote:
On Tue, Oct 25, 2016 at 3:39 AM, David Lechner wrote:
On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
From: Axel Haslam
Currently, the da8xx ohci driver uses a set of gpios and callbacks in
board
On Tue, Oct 25, 2016 at 04:08:50PM +0300, Felipe Balbi wrote:
>
> Hi,
>
> Bin Liu writes:
> >> >> > I run into a link state problem when dwc3 is in supper-speed device
> >> >> > mode.
> >> >> >
> >> >> > Modprobe g_zero, link state is U3 (checked in DSTS).
> >> >> >
> >> >> >
On Tue, Oct 25, 2016 at 6:12 PM, David Lechner wrote:
> On 10/25/2016 02:39 AM, Axel Haslam wrote:
>>
>> On Tue, Oct 25, 2016 at 2:38 AM, David Lechner
>> wrote:
>>>
>>> On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
-#ifndef
On 10/25/2016 11:21 AM, Axel Haslam wrote:
On Tue, Oct 25, 2016 at 6:12 PM, David Lechner wrote:
On 10/25/2016 02:39 AM, Axel Haslam wrote:
On Tue, Oct 25, 2016 at 2:38 AM, David Lechner
wrote:
On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
On 10/25/2016 02:39 AM, Axel Haslam wrote:
On Tue, Oct 25, 2016 at 2:38 AM, David Lechner wrote:
On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
-#ifndef CONFIG_ARCH_DAVINCI_DA8XX
-#error "This file is DA8xx bus glue. Define CONFIG_ARCH_DAVINCI_DA8XX."
-#endif
On 10/25/2016 05:12 AM, Sekhar Nori wrote:
On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
diff --git a/arch/arm/mach-davinci/usb-da8xx.c
b/arch/arm/mach-davinci/usb-da8xx.c
index 9e41a7f..982e105 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++
Hi Sekhar,
On 10/25/2016 05:17 AM, Sekhar Nori wrote:
On Tuesday 25 October 2016 03:07 PM, Axel Haslam wrote:
Hi Sekar,
On Tue, Oct 25, 2016 at 10:10 AM, Sekhar Nori wrote:
On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
From: David Lechner
On Tue, Oct 25, 2016 at 4:57 PM, Axel Haslam wrote:
> On Tue, Oct 25, 2016 at 4:33 PM, Mark Brown wrote:
>> On Tue, Oct 25, 2016 at 02:55:48PM +0200, Axel Haslam wrote:
>>
>>> To be able to use regulator to handle the overcurrent pin, i need to be able
* Johan Hovold [161025 01:33]:
> On Mon, Oct 24, 2016 at 10:35:38AM -0700, Tony Lindgren wrote:
>
> > From: Tony Lindgren
> > Date: Mon, 24 Oct 2016 09:18:02 -0700
> > Subject: [PATCH] usb: musb: Fix sleeping function called from invalid
> > context for hdrc
On Tue, Oct 25, 2016 at 4:33 PM, Mark Brown wrote:
> On Tue, Oct 25, 2016 at 02:55:48PM +0200, Axel Haslam wrote:
>
>> To be able to use regulator to handle the overcurrent pin, i need to be able
>> to somehow retrieve the over current pin state from the regulator driver.
>
>
This adds the device tree node for the usb otg
controller present in the da850 family of SoC's.
This also enables the otg usb controller for the lcdk board.
Signed-off-by: Alexandre Bailon
---
arch/arm/boot/dts/da850-lcdk.dts | 8
arch/arm/boot/dts/da850.dtsi
From: Petr Kulhavy
DT binding for the TI DA8xx/OMAP-L1x/AM17xx/AM18xx MUSB driver.
Signed-off-by: Petr Kulhavy
Signed-off-by: Alexandre Bailon
---
.../devicetree/bindings/usb/da8xx-usb.txt | 43 ++
1 file
From: Petr Kulhavy
This adds DT support for TI DA8xx/OMAP-L1x/AM17xx/AM18xx MUSB driver
Signed-off-by: Petr Kulhavy
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/da8xx.c | 76 ++--
1 file
From: Petr Kulhavy
This adds the function musb_get_mode() to get the DT property "dr_mode"
Signed-off-by: Petr Kulhavy
Acked-by: Sergei Shtylyov
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/musb_core.c |
The purpose of this series is to add DT support to the da8xx USB OTG.
This series should apply and build without any issues but it has
some dependencies on "Add DT support for ohci-da8xx" series.
Without it, the phy init will fail and then the da8xx driver will also fail.
Alexandre Bailon (1):
On Tue, Oct 25, 2016 at 02:55:48PM +0200, Axel Haslam wrote:
> To be able to use regulator to handle the overcurrent pin, i need to be able
> to somehow retrieve the over current pin state from the regulator driver.
What makes you say that, none of the existing users need this?
> As i was
I forget to add a dummy function in case the CONFIG_GENERIC_PHY
is disabled.
Signed-off-by: Randy Li
---
include/linux/phy/phy.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index ee1bed7..78bb0d7 100644
---
On Tue, Oct 25, 2016 at 04:44:13PM +0300, Felipe Balbi wrote:
[snip]
> > Just reviewed this patch, it seems to be the regression. But SS should
> > not generate ID pin event either, right? SS uses far-end termination, it
> > does not have ID pin as USB2.0. I will try to revert this patch to find
Currently, the USB OTG of the da8xx doesn't work.
This series intend to fix them.
Alexandre Bailon (3):
usb: musb: da8xx: Only execute the OTG workaround when phy in OTG mode
usb: musb: da8xx: Fixup the OTG workaround
usb: musb: da8xx: Call earlier clk_prepare_enable()
The first attempt to read a register may fail because the clock may not
be enabled, and then the probe of musb driver will fail.
Call clk_prepare_enable() before the first register read.
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/da8xx.c | 12 ++--
1 file
When the phy is forced in host mode, only the first hot plug and
hot remove works. That is actually because the driver execute the
OTG workaround, whereas it is not applicable in host or device mode.
Indeed, to work correctly, the VBUS sense and session end comparator
must be enabled, what is only
If we configure the da8xx OTG phy in OTG mode, neither device or host
mode will work. That is because the PHY is not able to detect and notify
the driver that value of ID pin changed.
To work despite this hardware limitation, the da8xx glue implement a
workaround.
But to work, the workaround
Hi,
Bin Liu writes:
>> >> >> > but actually dwc3 goes to U2. Is this expected?
>> >> >>
>> >> >> That's host putting the bus to U2 due to inactivity. No problems there.
>> >> >>
>> >> >> > Now remove the cable from the host, but dwc3 does not generate any
>> >> >> > change, link
On Tue, Oct 25, 2016 at 04:08:50PM +0300, Felipe Balbi wrote:
>
> Hi,
>
> Bin Liu writes:
> >> >> > I run into a link state problem when dwc3 is in supper-speed device
> >> >> > mode.
> >> >> >
> >> >> > Modprobe g_zero, link state is U3 (checked in DSTS).
> >> >> >
> >> >> >
On 10/25/2016 1:51 AM, Mathias Nyman wrote:
On 24.10.2016 17:52, Babu Moger wrote:
On 10/24/2016 5:54 AM, Yoshihiro Shimoda wrote:
Hi,
From: Mathias Nyman
Sent: Monday, October 24, 2016 6:58 PM
On 22.10.2016 01:25, Babu Moger wrote:
Never seen XHCI auto handoff working on TI and RENESAS
Hi,
Bin Liu writes:
>> >> > I run into a link state problem when dwc3 is in supper-speed device
>> >> > mode.
>> >> >
>> >> > Modprobe g_zero, link state is U3 (checked in DSTS).
>> >> >
>> >> > After dwc3 is enumerated by the host, the trace on the bus is as:
>> >> >
>> >> >
On 25.10.2016 13:45, Sriram Dash wrote:
For the USB3.0 controller, USB 2.0 reset not driven while
port is in Resume state. So, do not program the USB 2.0 reset
(PORTSC[PR]=1) while in Resume state.
Signed-off-by: Rajat Srivastava
Signed-off-by: Sriram Dash
Hi Mark,
On Mon, Oct 24, 2016 at 8:19 PM, Mark Brown wrote:
> On Mon, Oct 24, 2016 at 08:11:40PM +0200, Axel Haslam wrote:
>> On Mon, Oct 24, 2016 at 7:53 PM, Mark Brown wrote:
>
>> > does it make sense to report this as a mode, we don't report other
On Tue, Oct 25, 2016 at 02:07:09PM +0300, Felipe Balbi wrote:
>
> Hi,
>
> Bin Liu writes:
> > On Mon, Oct 24, 2016 at 12:35:11PM +0300, Felipe Balbi wrote:
> >>
> >> Hi,
> >>
> >> Bin Liu writes:
> >> > Hi,
> >> >
> >> > I run into a link state problem when dwc3
For xhci-hcd platform device, all the DMA parameters are not configured
properly, notably dma ops for dwc3 devices.
The idea here is that you pass in the parent of_node along with the child
device pointer, so it would behave exactly like the parent already does.
The difference is that it also
On 10/25/2016 12:03 PM, Sekhar Nori wrote:
> On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
>> From: Alexandre Bailon
>>
>> Some macro for DA8xx CFGCHIP are defined in usb-davinci.h,
>> but da8xx-cfgchip.h intend to replace them.
>> The usb-da8xx.c is using
For xhci-hcd platform device, all the DMA parameters are not configured
properly, notably dma ops for dwc3 devices.
The idea here is that you pass in the parent of_node along with the child
device pointer, so it would behave exactly like the parent already does.
The difference is that it also
Do not require dma_set_coherent_mask for hcd
Signed-off-by: Arnd Bergmann
---
drivers/usb/chipidea/core.c | 3 ---
drivers/usb/dwc3/core.c | 6 --
drivers/usb/dwc3/dwc3-st.c | 1 -
drivers/usb/dwc3/host.c | 4
4 files changed, 14 deletions(-)
diff --git
Hi,
Bin Liu writes:
> On Mon, Oct 24, 2016 at 12:35:11PM +0300, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Bin Liu writes:
>> > Hi,
>> >
>> > I run into a link state problem when dwc3 is in supper-speed device
>> > mode.
>> >
>> > Modprobe g_zero, link state is U3
For the USB3.0 controller, USB 2.0 reset not driven while
port is in Resume state. So, do not program the USB 2.0 reset
(PORTSC[PR]=1) while in Resume state.
Signed-off-by: Rajat Srivastava
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
Hi Axel,
On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
> From: Axel Haslam
>
> The purpose of this patch series is to add DT support and modernize
> the ohci-da8xx glue driver without breaking the non-DT boot,
> which is still used in unconverted davinci
Do not use dma_coerce_mask_and_coherent for hcd.
Signed-off-by: Arnd Bergmann
---
drivers/usb/dwc3/dwc3-exynos.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index 2f1fb7e..e27899b 100644
---
On Tue, Oct 25, 2016 at 12:43 PM, Sekhar Nori wrote:
> On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
>> From: Axel Haslam
>>
>> Currently, the da8xx ohci driver uses a set of gpios and callbacks in
>> board files to handle vbus and
On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
> From: Axel Haslam
>
> Currently, the da8xx ohci driver uses a set of gpios and callbacks in
> board files to handle vbus and overcurrent irqs form the power supply.
> However, this does not play nice when
On Tue, Oct 25, 2016 at 12:28 PM, Sekhar Nori wrote:
> On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
>> From: Axel Haslam
>>
>> The phy framework requests an optional "phy" regulator. If it does
>> not find one, it returns -EPROBE_DEFER. In
On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
> From: Axel Haslam
>
> The phy framework requests an optional "phy" regulator. If it does
> not find one, it returns -EPROBE_DEFER. In the case of non-DT based boot
> for the omap138-lcdk board, this would
On Tuesday 25 October 2016 03:07 PM, Axel Haslam wrote:
> Hi Sekar,
>
> On Tue, Oct 25, 2016 at 10:10 AM, Sekhar Nori wrote:
>> On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
>>> From: David Lechner
>>>
>>> The CFGCHIP registers are used by
On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
> diff --git a/arch/arm/mach-davinci/usb-da8xx.c
> b/arch/arm/mach-davinci/usb-da8xx.c
> index 9e41a7f..982e105 100644
> --- a/arch/arm/mach-davinci/usb-da8xx.c
> +++ b/arch/arm/mach-davinci/usb-da8xx.c
> @@ -53,11 +53,19 @@ int
On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
> From: Alexandre Bailon
>
> Some macro for DA8xx CFGCHIP are defined in usb-davinci.h,
> but da8xx-cfgchip.h intend to replace them.
> The usb-da8xx.c is using both headers, causing redefined symbol warnings.
On Tue, Oct 25, 2016 at 4:53 AM, David Lechner wrote:
> On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
>>
>> From: Axel Haslam
>>
>> While probing ochi phy with usb20 phy as a parent clock for usb11_phy,
>> the usb20_phy clock enable would time
On Tue, Oct 25, 2016 at 3:12 AM, David Lechner wrote:
> On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
>>
>> From: Axel Haslam
>> > static const struct ohci_driver_overrides da8xx_overrides __initconst =
>> > {
>> - .reset =
On Tue, Oct 25, 2016 at 3:02 AM, David Lechner wrote:
> On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
>>
>> From: Axel Haslam
>>
>> This patch documents the device tree bindings required for
>> the ohci controller found in TI da8xx family of
On Tue, Oct 25, 2016 at 11:18 AM, Sekhar Nori wrote:
> On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
>> +static struct platform_device da8xx_usb_phy = {
>> + .name = "da8xx-usb-phy",
>> + .id = 0,
>
> There is a single phy control in
Hi Sekar,
On Tue, Oct 25, 2016 at 10:10 AM, Sekhar Nori wrote:
> On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
>> From: David Lechner
>>
>> The CFGCHIP registers are used by a number of devices, so using a syscon
>> device to share them.
Good work on this patch, nice that it got merged.
I was just thinking that as an add-on, you may want to name
the gpio lines so they have meaningful names in userspace
when you use this with the chardev (I have reasons to believe
these GPIOs will be used from userspace, tell me if that
is wrong).
On Tue, 25 Oct 2016, Lu Baolu wrote:
> Add Documentation/usb/usb3-debug-port.txt. This document includes
> the user guide for USB3 debug port.
It's in reStructuredText, please name it .rst.
Thanks,
Jani.
>
> Cc: linux-...@vger.kernel.org
> Signed-off-by: Lu Baolu
On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
> +static struct platform_device da8xx_usb_phy = {
> + .name = "da8xx-usb-phy",
> + .id = 0,
There is a single phy control in the system for both 1.1 and 2.0 PHYs.
so this can be a singular device (id
This patch fixes the following checkpatch warning for usbip files
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
Signed-off-by: Jai Krishna
---
drivers/usb/usbip/vudc_dev.c | 8
drivers/usb/usbip/vudc_transfer.c | 6 +++---
2 files changed, 7
On Tue, Oct 25, 2016 at 02:01:30PM +0530, Jai Krishna wrote:
> Signed-off-by: Jai Krishna
> ---
> drivers/usb/usbip/vudc_dev.c | 8
> drivers/usb/usbip/vudc_transfer.c | 6 +++---
> 2 files changed, 7 insertions(+), 7 deletions(-)
I can't take patches with no
On Mon, Oct 24, 2016 at 10:35:38AM -0700, Tony Lindgren wrote:
> From: Tony Lindgren
> Date: Mon, 24 Oct 2016 09:18:02 -0700
> Subject: [PATCH] usb: musb: Fix sleeping function called from invalid
> context for hdrc glue
>
> Commit 65b3f50ed6fa ("usb: musb: Add PM runtime
Signed-off-by: Jai Krishna
---
drivers/usb/usbip/vudc_dev.c | 8
drivers/usb/usbip/vudc_transfer.c | 6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/usbip/vudc_dev.c b/drivers/usb/usbip/vudc_dev.c
index 7091848..c5375e7 100644
On Tue, Oct 25, 2016 at 3:39 AM, David Lechner wrote:
> On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
>>
>> From: Axel Haslam
>>
>> Currently, the da8xx ohci driver uses a set of gpios and callbacks in
>> board files to handle vbus and
On Monday 24 October 2016 10:16 PM, ahas...@baylibre.com wrote:
> From: David Lechner
>
> The CFGCHIP registers are used by a number of devices, so using a syscon
> device to share them. The first consumer of this will by the phy-da8xx-usb
> driver.
>
> Signed-off-by:
On Tue, Oct 25, 2016 at 2:53 AM, David Lechner wrote:
> On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
>>
>> From: Axel Haslam
>>
>> This adds the compatible string to the ohci driver
>> to be able to probe from DT
>>
>> Signed-off-by: Axel Haslam
On Tue, Oct 25, 2016 at 2:48 AM, David Lechner wrote:
> On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
>>
>> From: Axel Haslam
>>
>> This adds the usb (ohci) device node for the da850 soc.
>> Also it enables it for the lcdk board
>>
>>
On Tue, Oct 25, 2016 at 1:04 PM, Greg KH wrote:
> On Mon, Oct 24, 2016 at 10:46:13AM +0530, Jai Krishna wrote:
>> Fixing checkstyle warnings except symbolic permission warnings
>> (e.g. for S_IWUSR etc.). The symbolic permission warnings seem
>> to be widespread; so
On Tue, Oct 25, 2016 at 2:38 AM, David Lechner wrote:
> On 10/24/2016 11:46 AM, ahas...@baylibre.com wrote:
>>
>> From: Manjunath Goudar
>>
>> Separate the Davinci OHCI host controller driver from ohci-hcd
>> host code so that it can be built as
On Mon, Oct 24, 2016 at 08:40:35AM -0400, Bryan Paluch wrote:
> I don't think this patch is needed anymore. There are fixes to the timer wheel
> code that fix the issue properly. Timers were firing much earlier than 250 ms
> and setting the timer to 275 must have changed the resolution from 4 ms
On Mon, Oct 24, 2016 at 10:46:13AM +0530, Jai Krishna wrote:
> Fixing checkstyle warnings except symbolic permission warnings
> (e.g. for S_IWUSR etc.). The symbolic permission warnings seem
> to be widespread; so not fixing those as Im likely missing
> some context on why these are widespread.
>
On 24.10.2016 17:52, Babu Moger wrote:
On 10/24/2016 5:54 AM, Yoshihiro Shimoda wrote:
Hi,
From: Mathias Nyman
Sent: Monday, October 24, 2016 6:58 PM
On 22.10.2016 01:25, Babu Moger wrote:
Never seen XHCI auto handoff working on TI and RENESAS cards.
Eventually, we force handoff. This code
Hi,
On 10/25/2016 02:36 PM, Greg Kroah-Hartman wrote:
> On Tue, Oct 25, 2016 at 12:32:41PM +0800, Lu Baolu wrote:
>> xHCI debug capability (DbC) is an optional but standalone
>> functionality provided by an xHCI host controller. With DbC
>> hardware initialized, the system will present a debug
On Mon, Oct 24, 2016 at 10:56:45PM +0300, Mihaela Muraru wrote:
> This is a parch to the emxx_udc.c file that remove the
> 'usb_device_descriptor' structure because it is not used in the current
> file or in other one.
>
> Signed-off-by: Mihaela Muraru
> ---
>
On Tue, Oct 25, 2016 at 12:32:41PM +0800, Lu Baolu wrote:
> xHCI debug capability (DbC) is an optional but standalone
> functionality provided by an xHCI host controller. With DbC
> hardware initialized, the system will present a debug device
> through the USB3 debug port (normally the first USB3
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