On Sun, Sep 30, 2018 at 06:27:17PM +0200, Johan Hovold wrote:
> Hi Greg,
>
> Here are some device-id patches for 4.19-rc7 (unless you prefer to hold them
> off for 4.20).
>
> The option patches are a bit more intrusive than the usual device-id patches,
> but allows us to support a particular Quec
Hi Felipe,
(CC'ing Greg, in case you're on vacation)
Ping ? I'd really like to get this merged in v4.20. Do you think that would be
possible ?
On Tuesday, 25 September 2018 19:58:50 EEST Laurent Pinchart wrote:
> Hi Felipe,
>
> The following changes since commit 5b394b2ddf0347bef56e50c69a58773
Hi Wolfram,
> > > > > > Can we get the working set in while the issues is being debugged?
> > > > >
> > > > > I'm not the one making the decision, and I don't even know if
> > > > > this is going through the i2c or the usb tree? If it's going
> > > > > through the i2c tree you need a tag from the
Hi Peter,
> I'm not the one making the decision, and I don't even know if this
> is going through the i2c or the usb tree? If it's going through the
> i2c tree you need a tag from the usb people (Greg?) on patch 2/2,
> and if it's going through the usb tree, you need a tag from
On 2018-10-01 21:33, Ajay Gupta wrote:
> Hi Heikki and Peter,
>
> Can we get the working set in while the issues is being debugged?
I'm not the one making the decision, and I don't even know if this
is going through the i2c or the usb tree? If it's going through the
i2c tre
Sure. Just resent the patch stack !
On Mon, Oct 1, 2018 at 2:54 AM Heikki Krogerus
wrote:
>
> On Fri, Sep 28, 2018 at 04:47:02PM -0700, Badhri Jagan Sridharan wrote:
> > During HARD_RESET the data link is disconnected.
> > For self powered device, the spec is advising against doing that.
> >
> > >
>From USB_PD_R3_0
7.1.5 Response to Hard Resets
Device operation during and after a Hard Reset is defined as follows:
Self-powered devices Should Not disconnect from USB during a Hard Reset
(see Section 9.1.2).
Bus powered devices will disconnect from USB during a Hard Reset due to the
loss of thei
During the initial connect to a non-pd port, sink would hard reset
twice before deeming that the port partner is non-pd. TCPM sets the
the charge path to false during the hard reset. This causes unnecessary
connects/disconnects of charge path and makes port take longer to
charge from the non-pd por
During HARD_RESET the data link is disconnected.
For self powered device, the spec is advising against doing that.
>From USB_PD_R3_0
7.1.5 Response to Hard Resets
Device operation during and after a Hard Reset is defined as follows:
Self-powered devices Should Not disconnect from USB during a Hard
On Mon, Oct 01, 2018 at 07:33:02PM +, Ajay Gupta wrote:
> Hi Heikki and Peter,
>
> > > > > Can we get the working set in while the issues is being debugged?
> > > >
> > > > I'm not the one making the decision, and I don't even know if this
> > > > is going through the i2c or the usb tree? If i
Hi Heikki and Peter,
> > > > Can we get the working set in while the issues is being debugged?
> > >
> > > I'm not the one making the decision, and I don't even know if this
> > > is going through the i2c or the usb tree? If it's going through the
> > > i2c tree you need a tag from the usb people
On 09/20/2018 02:29 PM, Maciej Żenczykowski wrote:
> From: Maciej Żenczykowski
>
> Without this usbip fails on a machine with devices
> that lexicographically come after vhci_hcd.
>
> ie.
> $ ls -l /sys/devices/platform
> ...
> drwxr-xr-x. 4 root root0 Sep 19 16:21 serial8250
> -rw-r
On 01.10.2018 10:17, Heikki Krogerus wrote:
+Mika, Mathias
On Sat, Sep 29, 2018 at 08:51:43AM +0200, Ondrej Holy wrote:
Hi,
I recently got new Lenovo Thinkpad T480s with the ThinkPad Thunderbolt
3 Dock. The USB ports (but probably also audio and ethernet) on the
dock always don't work after re
From: Ben Dooks
The driver_info field that is used for describing each of the usb-net
drivers using the usbnet.c core all declare their information as const
and the usbnet.c itself does not try and modify the struct.
It is therefore a good idea to make this const in the usbnet.c structure
in cas
Intel Apollo Lake has the same internal USB role mux as
Intel Cherry Trail.
Cc:
Signed-off-by: Heikki Krogerus
---
Hi,
The patch with the topic fixed.
Thanks,
---
drivers/usb/host/xhci-pci.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/xhci-pci.c
On 28.09.2018 21:10, Jack Pham wrote:
Hi Mathias,
Jack, Peter, do these patches solve the remove issues you are seeing?
At my two USB3 platforms, only apply the 1st patch can fix my problem. Maybe
my USB3 port change interrupt occurs always before removing USB2 HCD.
It's possible yes.
Pe
On Mon, Oct 01, 2018 at 06:44:51PM +0300, Heikki Krogerus wrote:
> Hi,
>
> Not a biggie, but why was the topic for this patch changed?
>
> I'm not sure Apollo lakes even have Type-C connectors. The mux is
> needed with the uAB connectors.
My bad. The topic was wrong already when I send the patch
Hi,
Not a biggie, but why was the topic for this patch changed?
I'm not sure Apollo lakes even have Type-C connectors. The mux is
needed with the uAB connectors.
On Mon, Oct 01, 2018 at 06:36:09PM +0300, Mathias Nyman wrote:
> From: Heikki Krogerus
>
> Intel Apollo Lake has the same internal U
From: Chunfeng Yun
Give USB3 devices a better chance to enumerate at USB3 speeds if
they are connected to a suspended host.
Porting from "671ffdff5b13 xhci: resume USB 3 roothub first"
Cc:
Signed-off-by: Chunfeng Yun
Signed-off-by: Mathias Nyman
---
drivers/usb/host/xhci-mtk.c | 4 ++--
1 fi
On 28.09.2018 15:51, Greg KH wrote:
On Thu, Sep 20, 2018 at 06:43:19PM +0300, Mathias Nyman wrote:
Hi Greg
Second try, shuffling patches between for-usb-linus and for-usb-next
A few patches that makes sure USB3 devices enumerate to correct speed
after resume on Mediatek hosts, enables role mux
From: Heikki Krogerus
Intel Apollo Lake has the same internal USB role mux as
Intel Cherry Trail.
Cc:
Signed-off-by: Heikki Krogerus
Signed-off-by: Mathias Nyman
---
drivers/usb/host/xhci-pci.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/xhci-pc
The workaround for missing CAS bit is also needed for xHC on Intel
sunrisepoint PCH. For more details see:
Intel 100/c230 series PCH specification update Doc #332692-006 Errata #8
Cc:
Signed-off-by: Mathias Nyman
---
drivers/usb/host/xhci-pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --g
Hi Greg
Resending v2 due to lost patch 3/3
Second try, shuffling patches between for-usb-linus and for-usb-next
A few patches that makes sure USB3 devices enumerate to correct speed
after resume on Mediatek hosts, enables role mux on Apollo lake platforms,
and adds the missing cold attach status
On Mon, Oct 01, 2018 at 04:23:31PM +0200, Hans de Goede wrote:
> On 29-09-18 16:26, Yu Wang wrote:
> > The USB PHY mux switch depend on both USB2/USB3 PHY state and xHCI/xDCI
> > controller state. The role can't be switched if related states haven't
> > satisfied. That is why we need to poll the DU
Hi,
On 01-10-18 16:53, Wang, Yu1 wrote:
Hi Hans,
On 18-10-01 16:23:31, Hans de Goede wrote:
Hi,
On 29-09-18 16:26, Yu Wang wrote:
The USB PHY mux switch depend on both USB2/USB3 PHY state and xHCI/xDCI
controller state. The role can't be switched if related states haven't
satisfied. That is
Hi,
On 29-09-18 16:26, Yu Wang wrote:
The USB PHY mux switch depend on both USB2/USB3 PHY state and xHCI/xDCI
controller state. The role can't be switched if related states haven't
satisfied. That is why we need to poll the DUAL_ROLE_CFG1 to check if
the role switched successful or not.
So the
On Thu, Sep 27, 2018 at 02:42:38PM +0100, Biju Das wrote:
> Document r8a7744 xhci support. The driver will use the fallback
> compatible string "renesas,rcar-gen2-xhci", therefore no driver
> change is needed.
Reviewed-by: Simon Horman
On Thu, Sep 27, 2018 at 02:01:16PM +0100, Biju Das wrote:
> Document support for RZ/G1N (R8A7744) SoC.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Reviewed-by: Simon Horman
On Fri, Sep 28, 2018 at 04:47:02PM -0700, Badhri Jagan Sridharan wrote:
> During HARD_RESET the data link is disconnected.
> For self powered device, the spec is advising against doing that.
>
> >From USB_PD_R3_0
> 7.1.5 Response to Hard Resets
> Device operation during and after a Hard Reset is d
On Sun, Sep 30, 2018 at 2:29 PM Johan Hovold wrote:
> Turns out gpiolib still doesn't like having non-unique line names, so
> drop the line names from the recently added FTX cbus gpio
> implementation before adding support also for FT232R.
Oh.
> Linus, we finally got around to adding gpio suppo
On Sun, Sep 30, 2018 at 06:02:24PM +0200, Johan Hovold wrote:
> On Sat, Sep 29, 2018 at 09:54:03AM +, YueHaibing wrote:
> > Fixes gcc '-Wunused-but-set-variable' warning:
> >
> > drivers/usb/serial/cypress_m8.c: In function 'cypress_send':
> > drivers/usb/serial/cypress_m8.c:689:33: warning:
>
+Mika, Mathias
On Sat, Sep 29, 2018 at 08:51:43AM +0200, Ondrej Holy wrote:
> Hi,
>
> I recently got new Lenovo Thinkpad T480s with the ThinkPad Thunderbolt
> 3 Dock. The USB ports (but probably also audio and ethernet) on the
> dock always don't work after resume from suspend on up-to-date Fedor
Hi John,
On 9/28/2018 22:33, John Stultz wrote:
> On Thu, Sep 27, 2018 at 5:33 AM, Artur Petrosyan
> wrote:
>> We would like to buy the HiKey board to perform testes.
>> We found this HiKey LeMaker to have USB 2.0 ports
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__www.ebay.com_itm_HiKe
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