843992b6 (usb: dwc3: gadget: fix DEPSTARTCFG for non-EP0 EPs)
> Cc: # v3.2+
> Signed-off-by: John Youn
> Signed-off-by: Felipe Balbi
Felipe, I've verified it in my side. :)
ray@hr-slim:~/linux-usb$ sudo ./tools/usb/testusb -D /dev/bus/usb/002/004 -t 9
-s 2048 -a -c 5000
unkn
On Tue, Feb 10, 2015 at 09:55:14AM -0500, Alan Stern wrote:
> On Tue, 10 Feb 2015, Huang Rui wrote:
>
> > On Mon, Feb 09, 2015 at 08:59:06PM -0500, Alan Stern wrote:
> > > On Tue, 10 Feb 2015, Huang Rui wrote:
> > >
> > > > On Mon, Feb 09, 2015 at 10:59:
On Tue, Feb 10, 2015 at 08:52:02AM -0600, Felipe Balbi wrote:
> On Tue, Feb 10, 2015 at 09:58:23PM +0800, Huang Rui wrote:
> > On Mon, Feb 09, 2015 at 08:59:06PM -0500, Alan Stern wrote:
> > > On Tue, 10 Feb 2015, Huang Rui wrote:
> > >
> > > > On Mon, Feb 0
On Mon, Feb 09, 2015 at 08:59:06PM -0500, Alan Stern wrote:
> On Tue, 10 Feb 2015, Huang Rui wrote:
>
> > On Mon, Feb 09, 2015 at 10:59:42AM -0500, Alan Stern wrote:
> > > On Mon, 9 Feb 2015, Huang Rui wrote:
> > >
> > > > Hi,
> > > >
> &
On Mon, Feb 09, 2015 at 10:59:42AM -0500, Alan Stern wrote:
> On Mon, 9 Feb 2015, Huang Rui wrote:
>
> > Hi,
> >
> > Do you have any trick to downgrade one USB3 capacity device from super
> > speed mode to high speed mode on xhci port via host side?
>
> Con
Hi,
Do you have any trick to downgrade one USB3 capacity device from super
speed mode to high speed mode on xhci port via host side?
Thanks,
Rui
--
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On Tue, Jan 13, 2015 at 10:20:34AM -0600, Felipe Balbi wrote:
> On Tue, Jan 13, 2015 at 02:12:00PM +0800, Huang Rui wrote:
> > On Mon, Jan 12, 2015 at 02:20:14PM +0200, Heikki Krogerus wrote:
> > > Removing a few items that are not needed anymore and
> > > adding s
> make[3]: *** [drivers/usb/gadget/function] Error 2
> > make[2]: *** [drivers/usb/gadget] Error 2
> > make[2]: *** Waiting for unfinished jobs
> > CC [M] drivers/staging/lustre/lnet/selftest/ping_test.o
> >
> > Signed-off-by: Huang Rui
> > Cc: Peter Chen
>
e[3]: *** [drivers/usb/gadget/function] Error 2
make[2]: *** [drivers/usb/gadget] Error 2
make[2]: *** Waiting for unfinished jobs
CC [M] drivers/staging/lustre/lnet/selftest/ping_test.o
Signed-off-by: Huang Rui
Cc: Peter Chen
---
Felipe,
As mentioned at previous mail, this fix is for your curr
On Mon, Jan 12, 2015 at 02:20:14PM +0200, Heikki Krogerus wrote:
> Removing a few items that are not needed anymore and
> adding separate function for quirks.
>
> Signed-off-by: Heikki Krogerus
> Cc: Huang Rui
Looks good for me.
Acked-by: Huang Rui
Thanks,
Rui
> ---
&
rely on default PM callbacks from PCI driver utility
> > usb: dwc3: pci: code cleanup
>
> Can you test this series from Heikki and provide your Tested-by ?
>
Sure, looks like heikki's patch set didn't based on testing/next
branch. But no matter, I already applied them to
On Tue, Nov 04, 2014 at 08:47:26AM -0600, Felipe Balbi wrote:
> On Tue, Nov 04, 2014 at 05:29:51PM +0800, Huang Rui wrote:
> > Some SoC's FPGA platform will need this quirk, but it will complain if
> > running at true SoC platform. This is a normal case, so remove this
> &g
Some SoC's FPGA platform will need this quirk, but it will complain if
running at true SoC platform. This is a normal case, so remove this
warning.
Signed-off-by: Huang Rui
---
Hi,
This patch is based on balbi/testing/next branch.
Thanks,
Rui
---
drivers/usb/dwc3/core.c | 3 ---
1
ly
- Add pci quirk to avoid to bind with xhci driver
- Distinguish between simulation board and soc
- Break down all the special quirks
Thanks,
Rui
Huang Rui (8):
usb: dwc3: add Tx de-emphasis quirk
usb: dwc3: add disable usb3 suspend phy quirk
usb: dwc3: add disable usb2 suspend phy quir
This patch adds disable usb3 suspend phy quirk, and some special platforms
can configure that if it is needed.
Signed-off-by: Huang Rui
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
drivers/usb/dwc3/core.c| 6 ++
drivers/usb/dwc3/core.h
or platform data.
Signed-off-by: Huang Rui
---
Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++
drivers/usb/dwc3/core.c| 17 +
drivers/usb/dwc3/core.h| 11 +++
drivers/usb/dwc3/platform_data.h | 3
Since the discussion of below thread, current enablement works for
host-mode, device-mode hibernation is not implemented yet.
http://marc.info/?l=linux-usb&m=141452396814414&w=2
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 7 ++-
drivers/usb/dwc3/gadget.c | 2 +-
its Vendor and Device ID.
Suggested-by: Heikki Krogerus
Acked-by: Bjorn Helgaas
Cc: Jason Chang
Signed-off-by: Huang Rui
---
drivers/pci/quirks.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 90acb32..ed6f89b 100644
--
This patch adds PCI id for USB3 Dual-Role Device of AMD Nolan (NL) SoC.
It will be used for PCI quirks and DWC3 device driver.
Signed-off-by: Jason Chang
Signed-off-by: Huang Rui
Acked-by: Bjorn Helgaas
---
include/linux/pci_ids.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include
This patch adds disable usb2 suspend phy quirk, and some special platforms
can configure that if it is needed.
Signed-off-by: Huang Rui
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
drivers/usb/dwc3/core.c| 6 ++
drivers/usb/dwc3/core.h
This patch adds support for AMD Nolan (NL) FPGA and SoC platform.
Cc: Jason Chang
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/dwc3-pci.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index ada975f
hen HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than
HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1.
Signed-off-by: Huang Rui
---
Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++
drivers/usb/dwc3/core.c| 17 +
driv
On Thu, Oct 30, 2014 at 11:38:40AM -0500, Felipe Balbi wrote:
> On Thu, Oct 30, 2014 at 06:08:44PM +0800, Huang Rui wrote:
> > This patch adds support for AMD Nolan (NL) FPGA and SoC platform.
> >
> > Cc: Jason Chang
> > Signed-off-by: Huang Rui
> > ---
>
On Thu, Oct 30, 2014 at 11:39:43AM -0500, Felipe Balbi wrote:
> On Thu, Oct 30, 2014 at 06:08:41PM +0800, Huang Rui wrote:
> > This patch adds disable usb2 suspend phy quirk, and some special platforms
> > can configure that if it is needed.
> >
> &g
On Thu, Oct 30, 2014 at 11:42:10AM -0500, Felipe Balbi wrote:
> On Thu, Oct 30, 2014 at 06:08:39PM +0800, Huang Rui wrote:
> > This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is
> > configurable according to PIPE3 specification.
> >
> > Value
On Thu, Oct 30, 2014 at 12:35:56PM +0100, Arnd Bergmann wrote:
> On Thursday 30 October 2014 18:08:26 Huang Rui wrote:
> > It enables hibernation if the function is set in coreConsultant.
> >
> > Suggested-by: Felipe Balbi
> > Signed-off-by: Huang Rui
>
18: sent 62.50 MB read 21.17 MB/s write 15.90 MB/s ...
success
test 18p: write 0xee and read it back
test 18: sent 62.50 MB read 21.93 MB/s write 16.05 MB/s ...
success
Test suite ended: 2014??? 10??? 30??? ? 15:46:12 CST
Thanks,
Rui
Huang Rui (20):
usb: dwc
m if works on FPGA board.
Reported-by: Felipe Balbi
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 5 +
2 files changed, 11 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 5a47482..c
It enables hibernation if the function is set in coreConsultant.
Suggested-by: Felipe Balbi
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
drivers/usb/dwc3/core.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3
This patch adds disable scramble quirk, and it only needs to be enabled at
FPGA board on some vendor platforms.
[Note] In DesignWare databook, HW designer describes:
disscramble = disable scramble
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
Documentation/devicetree/bindings/usb
This patch initializes platform data at pci glue layer, and SoCs x86-based
platform vendor is able to define their flags in platform data at bus glue
layer. Then do some independent behaviors at dwc3 core level.
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
drivers/usb/dwc3/dwc3
This patch adds U2Exit LFPS quirk, and some special platforms can configure
that if it is needed.
[ ba...@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
drivers/usb/dwc3/core.c
applied to
proper core revisions. ]
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
drivers/usb/dwc3/core.c| 16 +++-
drivers/usb/dwc3/core.h| 26
This patch adds request P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.
[ ba...@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
drivers
This patch adds RX_DETECT to Polling.LFPS control quirk, and some special
platforms can configure that if it is needed.
[ ba...@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
Documentation/devicetree/bindings/usb/dwc3.txt | 2
This patch adds LFPS filter quirk, and some special platforms can configure
that if it is needed.
[ ba...@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
drivers/usb/dwc3/core.c
This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.
[ ba...@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
Documentation/devicetree/bindings/usb/dwc3.txt | 2
This patch adds P3 in U2 SS Inactive quirk, and some special platforms can
configure that if it is needed.
[ ba...@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
drivers/usb/dwc3
This patch adds delay PHY power change from P0 to P1/P2/P3 when link state
changing from U0 to U1/U2/U3 respectively, and some special platforms can
configure that if it is needed.
[ ba...@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
This patch adds disable usb3 suspend phy quirk, and some special platforms
can configure that if it is needed.
Signed-off-by: Huang Rui
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
drivers/usb/dwc3/core.c| 7 +++
drivers/usb/dwc3/core.h
It is recommended to set USB3 and USB2 SUSPHY bits to '1' after the core
initialization is completed above the dwc3 revision 1.94a.
Signed-off-by: Huang Rui
Signed-off-by: Felipe Balbi
---
drivers/usb/dwc3/core.c | 24
1 file changed, 24 insertions(+)
di
or platform data.
Signed-off-by: Huang Rui
---
Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++
drivers/usb/dwc3/core.c| 17 +
drivers/usb/dwc3/core.h| 11 +++
drivers/usb/dwc3/platform_data.h | 3
This patch adds disable usb2 suspend phy quirk, and some special platforms
can configure that if it is needed.
Signed-off-by: Huang Rui
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
drivers/usb/dwc3/core.c| 7 +++
drivers/usb/dwc3/core.h
hen HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than
HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1.
Signed-off-by: Huang Rui
---
Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++
drivers/usb/dwc3/core.c| 17 +
driv
its Vendor and Device ID.
Suggested-by: Heikki Krogerus
Acked-by: Bjorn Helgaas
Cc: Jason Chang
Signed-off-by: Huang Rui
---
drivers/pci/quirks.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 90acb32..ed6f89b 100644
--
This patch adds PCI id for USB3 Dual-Role Device of AMD Nolan (NL) SoC.
It will be used for PCI quirks and DWC3 device driver.
Signed-off-by: Jason Chang
Signed-off-by: Huang Rui
Acked-by: Bjorn Helgaas
---
include/linux/pci_ids.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include
This patch adds support for AMD Nolan (NL) FPGA and SoC platform.
Cc: Jason Chang
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/dwc3-pci.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index ada975f
On Wed, Oct 29, 2014 at 09:11:46AM -0500, Felipe Balbi wrote:
> On Wed, Oct 29, 2014 at 05:13:43PM +0800, Huang Rui wrote:
> > Hi Felipe, Paul,
> >
> > On Tue, Oct 28, 2014 at 10:35:37PM +0800, Huang Rui wrote:
> > > On Tue, Oct 28, 2014 at 08:38:
Hi Felipe, Paul,
On Tue, Oct 28, 2014 at 10:35:37PM +0800, Huang Rui wrote:
> On Tue, Oct 28, 2014 at 08:38:56AM -0500, Felipe Balbi wrote:
> >
> > however, as I mentioned before, the core shouldn't have to know that
> > it's running on an AMD platform. We al
On Tue, Oct 28, 2014 at 01:43:03PM -0500, Felipe Balbi wrote:
> On Tue, Oct 28, 2014 at 10:27:27AM -0600, Bjorn Helgaas wrote:
> > On Tue, Oct 28, 2014 at 5:54 AM, Huang Rui wrote:
> > > This patch adds Tx demphasis quirk, and the Tx demphasis value is
> >
> > &qu
On Tue, Oct 28, 2014 at 10:30:50AM -0600, Bjorn Helgaas wrote:
> On Tue, Oct 28, 2014 at 5:54 AM, Huang Rui wrote:
> > When parameter DWC_USB3_LPM_ERRATA_ENABLE is enabled in Andvanced
>
> "Advanced"
>
> > Configuration of coreConsultant, it supports of xHCI BE
06:55:50PM +, Paul Zimmerman wrote:
> > > > > From: Felipe Balbi [mailto:ba...@ti.com]
> > > > > Sent: Tuesday, October 28, 2014 11:51 AM
> > > > >
> > > > > On Tue, Oct 28, 2014 at 06:47:08PM +, Paul Zimmerman wrote:
> > &
Hi Bjorn,
On Tue, Oct 28, 2014 at 10:39:26AM -0600, Bjorn Helgaas wrote:
> On Tue, Oct 28, 2014 at 5:54 AM, Huang Rui wrote:
> > This patch adds disscramble quirk, and it only needs to be enabled at fpga
>
> "disscramble" (in subject and above) is not a r
On Tue, Oct 28, 2014 at 09:41:56AM -0500, Felipe Balbi wrote:
> Hi,
>
> On Tue, Oct 28, 2014 at 07:54:21PM +0800, Huang Rui wrote:
> > Hi,
> >
> > The series of patches add AMD Nolan (NL) SoC support for DesignWare USB3
> > OTG IP with PCI bus glue layer. This
On Tue, Oct 28, 2014 at 08:38:56AM -0500, Felipe Balbi wrote:
> Hi,
>
> almost there...
>
> On Tue, Oct 28, 2014 at 07:54:40PM +0800, Huang Rui wrote:
> > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> > index 8b94ad5..b08a2f9 100644
> > --- a/
On Tue, Oct 28, 2014 at 03:06:31PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 10/28/2014 2:54 PM, Huang Rui wrote:
>
> >The AMD Nolan (NL) SoC contains a DesignWare USB3 Dual-Role Device that can
> >be operated either as a USB Host or a USB Device. In the AMD NL
the threhold is configurable for each soc platform.
This patch adds an entry that soc platform is able to define the lpm
capacity with their own device tree or bus glue layer.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 16 +++-
drivers/usb/dwc3/core.h
It enables hibernation if the function is set in coreConsultant.
Suggested-by: Felipe Balbi
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index fa396fc..bf77509 100644
--- a/drivers/usb
This patch initializes platform data at pci glue layer, and SoCs x86-based
platform vendor is able to define their flags in platform data at bus glue
layer. Then do some independent behaviors at dwc3 core level.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/dwc3-pci.c | 9 +
1 file
This patch adds disscramble quirk, and it only needs to be enabled at fpga
board on some vendor platforms.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 14 +-
drivers/usb/dwc3/core.h | 3 +++
drivers/usb/dwc3/platform_data.h | 2 ++
3 files changed, 18
uccess
Test suite ended: 2014??? 10??? 28??? ? 19:33:50 CST
Thanks,
Rui
Huang Rui (19):
usb: dwc3: enable hibernation if to be supported
usb: dwc3: add a flag to check if it is fpga board
usb: dwc3: initialize platform data at pci glue layer
usb: dwc3: add disscramble quirk
usb
m
if works on FPGA board.
Reported-by: Felipe Balbi
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 5 +
2 files changed, 11 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index bf77509..ddac372 100644
--- a/drivers/us
This patch adds P3 in U2 SS inactive quirk, and some special platforms can
configure that if it is needed.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 23 +++
drivers/usb/dwc3/core.h | 3 +++
drivers/usb/dwc3/platform_data.h | 1 +
3 files
This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 5 +
drivers/usb/dwc3/platform_data.h | 1 +
3 files changed
This patch adds LFPS filter quirk, and some special platforms can configure
that if it is needed.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 3 +++
drivers/usb/dwc3/platform_data.h | 1 +
3 files changed, 10 insertions(+)
diff
This patch adds request P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 3 +++
drivers/usb/dwc3/platform_data.h | 1 +
3 files changed, 10
This patch adds u2exit lfps quirk, and some special platforms can configure
that if it is needed.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 3 +++
drivers/usb/dwc3/platform_data.h | 1 +
3 files changed, 10 insertions(+)
diff
This patch adds delay PHY power change from P0 to P1/P2/P3 when link state
changing from U0 to U1/U2/U3 respectively, and some special platforms can
configure that if it is needed.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 3
It is recommended to set USB3 and USB2 SUSPHY bits to '1' after the core
initialization is completed above the dwc3 revision 1.94a.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/usb/dwc
This patch adds RX_DETECT to Polling.LFPS control quirk, and some special
platforms can configure that if it is needed.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 3 +++
drivers/usb/dwc3/platform_data.h | 1 +
3 files changed, 10
This patch adds disable usb2 suspend phy quirk, and some special platforms
can configure that if it is needed.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 2 ++
drivers/usb/dwc3/platform_data.h | 1 +
3 files changed, 9 insertions
This patch adds support for AMD Nolan (NL) FPGA and SoC platform.
Cc: Jason Chang
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 9 +
drivers/usb/dwc3/core.h | 2 ++
drivers/usb/dwc3/dwc3-pci.c | 19 +++
drivers/usb/dwc3/platform_data.h
platform data.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 17 +
drivers/usb/dwc3/core.h | 11 +++
drivers/usb/dwc3/platform_data.h | 3 +++
3 files changed, 31 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index
its Vendor and Device ID.
Suggested-by: Heikki Krogerus
Cc: Bjorn Helgaas
Cc: Jason Chang
Signed-off-by: Huang Rui
---
drivers/pci/quirks.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 90acb32..1152bef 100644
--- a/drive
This patch adds disable usb3 suspend phy quirk, and some special platforms
can configure that if it is needed.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 2 ++
drivers/usb/dwc3/platform_data.h | 1 +
3 files changed, 9 insertions
This patch adds PCI id for USB3 Dual-Role Device of AMD Nolan (NL) SoC.
It will be used for PCI quirks and DWC3 device driver.
Signed-off-by: Jason Chang
Signed-off-by: Huang Rui
---
include/linux/pci_ids.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/pci_ids.h b/include
On Fri, Oct 24, 2014 at 10:35:29AM -0600, Bjorn Helgaas wrote:
> On Fri, Oct 17, 2014 at 04:53:27PM +0800, Huang Rui wrote:
> > The dwc3 controller is the PCI-E device in AMD NL platform, but the class
> > code
> > of PCI header is 0x0c0330, the same with xHC. That's bec
On Fri, Oct 17, 2014 at 09:48:59AM -0500, Felipe Balbi wrote:
> On Fri, Oct 17, 2014 at 04:53:32PM +0800, Huang Rui wrote:
> > When parameter DWC_USB3_LPM_ERRATA_ENABLE is enabled in Andvanced
> > Configuration
> > of coreConsultant, it supports of xHCI BESL Errat
On Fri, Oct 17, 2014 at 10:10:26AM -0500, Felipe Balbi wrote:
> Hi,
>
> On Fri, Oct 17, 2014 at 04:53:25PM +0800, Huang Rui wrote:
> > The series of patches add AMD NL SoC support for DesignWare USB3 OTG
> > IP with PCI bus glue layer. This controller supported hibernation
On Mon, Oct 20, 2014 at 04:41:54PM +0800, Huang Rui wrote:
> On Fri, Oct 17, 2014 at 01:48:19PM -0500, Felipe Balbi wrote:
> > Hi,
> >
> > On Fri, Oct 17, 2014 at 06:41:04PM +, Paul Zimmerman wrote:
> > > > From: Felipe Balbi [mailto:ba...@ti.com]
> >
On Fri, Oct 17, 2014 at 01:48:19PM -0500, Felipe Balbi wrote:
> Hi,
>
> On Fri, Oct 17, 2014 at 06:41:04PM +, Paul Zimmerman wrote:
> > > From: Felipe Balbi [mailto:ba...@ti.com]
> > > Sent: Friday, October 17, 2014 8:00 AM
> > >
> > > On Fri
On Fri, Oct 17, 2014 at 09:50:00AM -0500, Felipe Balbi wrote:
> Hi,
>
> On Fri, Oct 17, 2014 at 04:53:33PM +0800, Huang Rui wrote:
> > AMD NL needs to enable u2exit lfps quirk.
> >
> > Signed-off-by: Huang Rui
> > ---
> > drivers/usb/dwc3/core.c
On Fri, Oct 17, 2014 at 09:45:32AM -0500, Felipe Balbi wrote:
> Hi,
>
> On Fri, Oct 17, 2014 at 04:53:31PM +0800, Huang Rui wrote:
> > AMD NL fpga needs to enable disscramble quirk. And this quirk doesn't need
> > on
> > the true soc.
> >
> > Signed
On Fri, Oct 17, 2014 at 09:41:44AM -0500, Felipe Balbi wrote:
> HI,
>
> On Fri, Oct 17, 2014 at 04:53:30PM +0800, Huang Rui wrote:
> > This patch adds a quirks flag at dwc3 structure, and SoCs platform vendor is
> > able to define this flag in platform data at bus glu
AMD NL needs to enable Tx Deemphasis quirk.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 3 +++
drivers/usb/dwc3/core.h | 2 ++
drivers/usb/dwc3/dwc3-pci.c | 3 ++-
drivers/usb/dwc3/platform_data.h | 1 +
4 files changed, 8 insertions(+), 1 deletion(-)
diff
AMD NL needs to enable lfps filter quirk.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 3 +++
drivers/usb/dwc3/core.h | 1 +
drivers/usb/dwc3/dwc3-pci.c | 3 ++-
drivers/usb/dwc3/platform_data.h | 1 +
4 files changed, 7 insertions(+), 1 deletion(-)
diff --git
AMD NL needs to suspend usb3 ss phy, but this doesn't enable on simulation
board.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 7 ++-
drivers/usb/dwc3/dwc3-pci.c | 3 ++-
drivers/usb/dwc3/platform_data.h | 1 +
3 files changed, 9 insertions(+), 2 deletions(-)
AMD NL needs to enable RX_DETECT to Polling.LFPS control quirk.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 3 +++
drivers/usb/dwc3/core.h | 1 +
drivers/usb/dwc3/dwc3-pci.c | 3 ++-
drivers/usb/dwc3/platform_data.h | 1 +
4 files changed, 7 insertions(+), 1
AMD NL needs to delay PHY power change from P0 to P1/P2/P3 when link state
changing from U0 to U1/U2/U3 respectively.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 3 +++
drivers/usb/dwc3/core.h | 1 +
drivers/usb/dwc3/dwc3-pci.c | 3 ++-
drivers/usb/dwc3
AMD NL needs to enable always request P1/P2/P3 for U1/U2/U3 for AMD own phy.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 3 +++
drivers/usb/dwc3/core.h | 1 +
drivers/usb/dwc3/dwc3-pci.c | 3 ++-
drivers/usb/dwc3/platform_data.h | 1 +
4 files changed, 7
AMD NL needs to delay P0 to P1/P2/P3 request when entering U1/U2/U3.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 3 +++
drivers/usb/dwc3/core.h | 2 ++
drivers/usb/dwc3/dwc3-pci.c | 3 ++-
drivers/usb/dwc3/platform_data.h | 1 +
4 files changed, 8 insertions
AMD NL needs to enable P3 OK for U2/SSInactive on USB3PIPE register.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 20
drivers/usb/dwc3/core.h | 1 +
drivers/usb/dwc3/dwc3-pci.c | 3 ++-
drivers/usb/dwc3/platform_data.h | 1 +
4 files
AMD NL needs to enable u2exit lfps quirk.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 4
drivers/usb/dwc3/core.h | 1 +
drivers/usb/dwc3/dwc3-pci.c | 3 ++-
drivers/usb/dwc3/platform_data.h | 1 +
4 files changed, 8 insertions(+), 1 deletion(-)
diff --git
This patch adds a quirks flag at dwc3 structure, and SoCs platform vendor is
able to define this flag in platform data at bus glue layer. Then do some
independent behaviors at dwc3 core level.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 2 ++
drivers/usb/dwc3/core.h
AMD NL fpga needs to enable disscramble quirk. And this quirk doesn't need on
the true soc.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 8 +++-
drivers/usb/dwc3/dwc3-pci.c | 5 +
drivers/usb/dwc3/platform_data.h | 4
3 files changed, 16 insertions(
It enables hibernation if the function is set in coreConsultant.
Suggested-by: Felipe Balbi
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index fa396fc..bf77509 100644
--- a/drivers/usb
62.50 MB read 22.33 MB/s write 16.15 MB/s ...
success
Test suite ended: 2014??? 10??? 09??? ? 18:13:36 CST
Thanks,
Rui
Huang Rui (16):
usb: dwc3: add AMD NL support
pci: quirks: add quirk to avoid AMD NL to bind with xhci
usb: dwc3: enable hibernation if to be support
Add PCI device ID of AMD NL SoC.
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/dwc3-pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index a36cf66..3806547 100644
--- a/drivers/usb/dwc3/dwc3-pci.c
+++ b/drivers/usb/dwc3/dwc3
add an entry that soc platform is able to define the lpm capacity
with their own device tree or bus glue layer.
Suggested-by: Felipe Balbi
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 2 ++
drivers/usb/dwc3/core.h | 24 +++-
drivers/usb/dwc3/dwc3
m
if works on FPGA board.
Reported-by: Felipe Balbi
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 6 ++
drivers/usb/dwc3/core.h | 5 +
2 files changed, 11 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index bf77509..ddac372 100644
--- a/drivers/us
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