Re: [PATCH v2 6/6] usb: chipidea: add work-around for Marvell HSIC PHY startup

2015-05-20 Thread Peter Chen
On Tue, May 19, 2015 at 09:10:05PM -0500, Rob Herring wrote: > The Marvell 28nm HSIC PHY requires the port to be forced to HS mode after > the port power is applied. This is done using the test mode in the PORTSC > register. > > As HSIC is always HS, this work-around should be safe to do with all

Re: [PATCH v2 6/6] usb: chipidea: add work-around for Marvell HSIC PHY startup

2015-05-20 Thread Rob Herring
On Wed, May 20, 2015 at 10:13 PM, Peter Chen wrote: > On Tue, May 19, 2015 at 09:10:05PM -0500, Rob Herring wrote: >> The Marvell 28nm HSIC PHY requires the port to be forced to HS mode after >> the port power is applied. This is done using the test mode in the PORTSC >> register. >> >> As HSIC is

RE: [PATCH v2 6/6] usb: chipidea: add work-around for Marvell HSIC PHY startup

2015-05-21 Thread Peter Chen
> > On Wed, May 20, 2015 at 10:13 PM, Peter Chen > wrote: > > On Tue, May 19, 2015 at 09:10:05PM -0500, Rob Herring wrote: > >> The Marvell 28nm HSIC PHY requires the port to be forced to HS mode > >> after the port power is applied. This is done using the test mode in > >> the PORTSC register.

Re: [PATCH v2 6/6] usb: chipidea: add work-around for Marvell HSIC PHY startup

2015-05-22 Thread Peter Chen
On Thu, May 21, 2015 at 09:54:20AM +, Peter Chen wrote: > > > > > On Wed, May 20, 2015 at 10:13 PM, Peter Chen > > wrote: > > > On Tue, May 19, 2015 at 09:10:05PM -0500, Rob Herring wrote: > > >> The Marvell 28nm HSIC PHY requires the port to be forced to HS mode > > >> after the port power