On 1/28/2017 6:21 PM, Bruno Herrera wrote:
> This patch introduces a new parameter to activate USB OTG HS/FS core embedded
> phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the
> transceiver.
> Also add the dwc2_core_params structure for stm32f4 otg fs.
>
> Signed-off-by:
On 1/28/2017 6:21 PM, Bruno Herrera wrote:
> This patch introduces a new parameter to activate USB OTG HS/FS core embedded
> phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the
> transceiver.
> Also add the dwc2_core_params structure for stm32f4 otg fs.
>
Could you fix the
This patch introduces a new parameter to activate USB OTG HS/FS core embedded
phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the
transceiver.
Also add the dwc2_core_params structure for stm32f4 otg fs.
Signed-off-by: Bruno Herrera
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