Re: [PATCH v4 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

2017-01-31 Thread John Youn
On 1/28/2017 6:21 PM, Bruno Herrera wrote: > This patch introduces a new parameter to activate USB OTG HS/FS core embedded > phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the > transceiver. > Also add the dwc2_core_params structure for stm32f4 otg fs. > > Signed-off-by:

Re: [PATCH v4 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

2017-01-30 Thread John Youn
On 1/28/2017 6:21 PM, Bruno Herrera wrote: > This patch introduces a new parameter to activate USB OTG HS/FS core embedded > phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the > transceiver. > Also add the dwc2_core_params structure for stm32f4 otg fs. > Could you fix the

[PATCH v4 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

2017-01-28 Thread Bruno Herrera
This patch introduces a new parameter to activate USB OTG HS/FS core embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the transceiver. Also add the dwc2_core_params structure for stm32f4 otg fs. Signed-off-by: Bruno Herrera ---