On Thu, Jan 30, 2014 at 07:55:20PM +0200, Xenia Ragiadakou wrote:
> Well, actually a simple undef won't work here because
> asm-generic/io-64-nonatomic-lo-hi.h includes linux/io.h which
> defines writeq for 64bit systems. So the revert would be necessary i
> guess :(
It's fine, the hosts are just
On 30/01/2014 07:42 μμ, Xenia Ragiadakou wrote:
On 30/01/2014 12:00 πμ, Sarah Sharp wrote:
On Wed, Jan 29, 2014 at 12:50:04PM +0200, Xenia Ragiadakou wrote:
On 29/01/2014 12:08 μμ, Rafał Miłecki wrote:
I've enabled some debugging in xhci-dbg.c, does it help?
xhci_hcd :04:00.0: xHCI capabil
On 30/01/2014 12:00 πμ, Sarah Sharp wrote:
On Wed, Jan 29, 2014 at 12:50:04PM +0200, Xenia Ragiadakou wrote:
On 29/01/2014 12:08 μμ, Rafał Miłecki wrote:
I've enabled some debugging in xhci-dbg.c, does it help?
xhci_hcd :04:00.0: xHCI capability registers at c90004e6:
xhci_hcd :
From: Xenia Ragiadakou
> On 30/01/2014 11:21 πμ, Rafał Miłecki wrote:
> > 2014-01-29 Xenia Ragiadakou :
> >> Rafał is it possible to send all the "bad" output with xhci debugging on?
> >> Since your config file shows that dynamic debugging is on, that would be
> >> easy to do by adding dyndbg='modu
On 30/01/2014 11:21 πμ, Rafał Miłecki wrote:
2014-01-29 Xenia Ragiadakou :
Rafał is it possible to send all the "bad" output with xhci debugging on?
Since your config file shows that dynamic debugging is on, that would be
easy to do by adding dyndbg='module xhci_hcd +p' or xhci_hcd.dyndbg=+p boo
From: Sarah Sharp
> On Wed, Jan 29, 2014 at 12:50:04PM +0200, Xenia Ragiadakou wrote:
> >
> > Like Bjørn already pointed out, I think too the problem is that the
> > USB3.0 host controller does not support 64 bit addressing (this can
> > be seen from the first bit of HCC PARAMS that is 0) but the p
On Wed, Jan 29, 2014 at 02:00:29PM -0800, Sarah Sharp wrote:
> I think the solution should be to just revert the writeq patch, and
> leave the xhci_write64 in place. We can always optimize that function
> later to do a writeq if the host supports 64-bit writes, but we'll have
> to analyze whether
On Wed, Jan 29, 2014 at 12:50:04PM +0200, Xenia Ragiadakou wrote:
> On 29/01/2014 12:08 μμ, Rafał Miłecki wrote:
> >I've enabled some debugging in xhci-dbg.c, does it help?
> >xhci_hcd :04:00.0: xHCI capability registers at c90004e6:
> >xhci_hcd :04:00.0: CAPLENGTH AND HCIVERSION 0x
On 29/01/2014 01:43 μμ, David Laight wrote:
From: Xenia Ragiadakou
On 29/01/2014 12:08 μμ, Rafał Miłecki wrote:
2014-01-29 David Laight :
Maybe I misunderstand something, but won't that commit end up replacing
the previous pair of writel() with a single native writeq() on 64bit
platforms?
Jud
From: Xenia Ragiadakou
> On 29/01/2014 12:08 μμ, Rafał Miłecki wrote:
> > 2014-01-29 David Laight :
> >>> Maybe I misunderstand something, but won't that commit end up replacing
> >>> the previous pair of writel() with a single native writeq() on 64bit
> >>> platforms?
> >>>
> >>> Judging by the c
On 29/01/2014 12:08 μμ, Rafał Miłecki wrote:
2014-01-29 David Laight :
Maybe I misunderstand something, but won't that commit end up replacing
the previous pair of writel() with a single native writeq() on 64bit
platforms?
Judging by the comment in front of the xhci_write_64(), that might not
n
From: Of Bjørn Mork
> Rafal Milecki writes:
>
> > Hi,
> >
> > This is report from my Samsung NP700G7A-S01PL. This notebook has two
> > USB 2.0 ports and two 3.0 ports.
> >
> > Starting with the following commit:
> >
> > commit 7dd09a1af2c7150269350aaa567a11b06e831003
> > Author: Xenia Ragiadakou
Rafał Miłecki writes:
> Hi,
>
> This is report from my Samsung NP700G7A-S01PL. This notebook has two
> USB 2.0 ports and two 3.0 ports.
>
> Starting with the following commit:
>
> commit 7dd09a1af2c7150269350aaa567a11b06e831003
> Author: Xenia Ragiadakou
> Date: Fri Nov 15 05:34:09 2013 +0200
>
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