Hi Felipe & Mathias,
It seems that my below reply mail failed to be shown on lkml.org.
So I have to resend it. Like to have your comment/suggestion before I begin
the
solution implement work. Thanks
Ran Wang wrote:
>
> Hello Felipe,
>
> Felipe Balbi wrote:
> >
> > Hi Ran,
> >
> > Ran W
Hello Felipe,
Felipe Balbi wrote:
>
> Hi Ran,
>
> Ran Wang writes:
> >> > Then, DWC3 core driver continued to call function
> >> > dwc3_host_init()->platform_device_add(xhci)…
> >> > xhci_plat_probe()->usb_add_hcd()->xhci_plat_setup()->xhci_gen_set
> >> > up
> >> > -> xhci_reset(), which wou
Hi Ran,
Ran Wang writes:
>> > Then, DWC3 core driver continued to call function
>> > dwc3_host_init()->platform_device_add(xhci)…
>> > xhci_plat_probe()->usb_add_hcd()->xhci_plat_setup()->xhci_gen_setup->
>> > xhci_reset(), which would reset xHCI controller. At this point, the
>> > VBUS EN pin (
Hello Felipe,
Felipe Balbi wrote:
> Hi,
>
> Ran Wang writes:
> > Hello Felipe,
> >
> > We’ve found on some Layerscape platforms which integrating DWC3
>
> which platform is that? Is it supported upstream? Which kernel version are
> you using?
We reproduced this issue on board LS1043ARDB with
Hi,
Ran Wang writes:
> Hello Felipe,
>
> We’ve found on some Layerscape platforms which integrating DWC3
which platform is that? Is it supported upstream? Which kernel version
are you using?
> USB3.0 DRD controller, VBUS glitch happened and caused some USB drives
what do you mean by glitch?
Resend this mail in plain text.
Hello Felipe,
We’ve found on some Layerscape platforms which integrating DWC3 USB3.0 DRD
controller, VBUS glitch happened and caused some USB drives enumeration fail,
like to discuss the details as below.
Story is that, we found once function dwc3_core_init_mo
