Hi,
On Sunday 14 September 2014 07:54 AM, Felipe Balbi wrote:
Hi,
On Sat, Sep 13, 2014 at 12:16:01PM +0530, Kishon Vijay Abraham I wrote:
On Saturday 13 September 2014 12:58 AM, Andy Gross wrote:
This patch adds a new driver for the Qualcomm USB 3.0 PHY that exists on
some
Qualcomm
On 12 September 2014 18:37, Andrew Bresticker abres...@chromium.org wrote:
On Tue, Sep 9, 2014 at 1:21 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 8 September 2014 18:22, Andrew Bresticker abres...@chromium.org wrote:
On Mon, Sep 8, 2014 at 8:34 AM, Tomeu Vizoso to...@tomeuvizoso.net
-Original Message-
From: linux-usb-ow...@vger.kernel.org [mailto:linux-usb-
ow...@vger.kernel.org] On Behalf Of David Laight
Sent: Friday, September 12, 2014 11:34 AM
To: 'Krzysztof Opasiak'; matt.por...@linaro.org; linux-
u...@vger.kernel.org
Cc: s.wa...@samsung.com;
Hi Greg,
Sorry for the high number of iterations on this one. After the documentation
issues pointed out during review, I've just received a report from a user
that (as I already suspected) another seagate disk enclosure also benifits
from this quirk. So this version sets the quirk for 2
And set this quirk for the Seagate Expansion Desk (0bc2:2312), as that one
seems to hang upon receiving an ATA_12 or ATA_16 command.
https://bugzilla.kernel.org/show_bug.cgi?id=79511
https://bbs.archlinux.org/viewtopic.php?id=183190
While at it also add missing documentation for the u value for
From: Alan Stern
...
p = quirks;
while (*p) {
@@ -543,6 +544,9 @@ void usb_stor_adjust_quirks(struct usb_device *udev,
unsigned long *fflags)
case 's':
f |= US_FL_SINGLE_LUN;
break;
+ case 't':
+
On Sat, Sep 13, 2014 at 06:27:06AM +, Peter Chen wrote:
On Thu, Sep 11, 2014 at 08:28:59AM +0800, Peter Chen wrote:
On Wed, Sep 03, 2014 at 09:40:38AM +0200, Antoine Tenart wrote:
Again, rebase my next-tree, and modify the msm part.
git://github.com/hzpeterchen/linux-usb.git
This patch adds support of the PHY framework in OTG and keeps the USB
PHY compatibility. Here the only modification is to add PHY member in
the OTG structure, along with the USB PHY one.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
---
include/linux/usb/otg.h | 3 +++
1 file
The patch adding support to the generic PHY framework introduced a
'gen_phy' member in the HCD structure. Rename it to 'phy' to have a
consistent USB framework.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Alan Stern st...@rowland.harvard.edu
---
This patch modify the generic code handling PHYs to allow them to be
supplied from the drivers. This adds checks to ensure no PHY was already
there when looking for one in the generic code. This also makes sure we
do not modify its state in the generic HCD functions, it was provided by
the driver.
Document the USB2 ChipIdea driver (ci13xxx) bindings.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
---
.../devicetree/bindings/usb/ci-hdrc-usb2.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644
Add the driver driving the Marvell Berlin USB PHY. This allows to
initialize the PHY and to use it from the USB driver later.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
---
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile | 1 +
Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
and DMA mask, to support USB2 ChipIdea controllers that don't need
specific functions.
Tested on the Marvell Berlin SoCs USB controllers.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
---
From: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Adds nodes describing the Marvell Berlin BG2CD USB PHY and USB. The BG2CD
SoC has 2 USB ChipIdea controllers, with usb0 host-only and usb1 dual-role
capable.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Document the bindings of the Marvell Berlin USB PHY driver.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
---
Documentation/devicetree/bindings/phy/berlin-usb-phy.txt | 16
1 file changed, 16 insertions(+)
create mode 100644
From: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Enable usb1 on Google Chromecast which is connected to micro-USB
plug used for external power supply, too.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Signed-off-by: Antoine Tenart
The chip controller node now also describes the Marvell Berlin reset
controller. Add the required 'reset-cells' property.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Philipp Zabel p.za...@pengutronix.de
---
arch/arm/boot/dts/berlin2.dtsi | 1 +
Enable the 2 available USB PHY and USB nodes on the Marvell Berlin BG2Q
DMP.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 53 ++
1 file changed, 53 insertions(+)
diff --git
Adds nodes describing the Marvell Berlin BG2Q USB PHY and USB. The BG2Q
SoC has 3 USB host controller, compatible with ChipIdea.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
---
arch/arm/boot/dts/berlin2q.dtsi | 52 +
1 file changed, 52
This series adds the support for ChipIdea USB2 (ci13xxx) controllers,
the USB PHYs of the Marvell Berlin SoCs and also adds a reset
controller for these SoCs.
The reset controller is used by the PHY driver and shares the
existing chip controller node with the clocks and one pin controller.
The
The Marvell Berlin SoCs now has a reset controller. Add the needed
configuration.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
---
arch/arm/mach-berlin/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig
This patch adds support of the PHY framework for ChipIdea drivers.
Changes are done in both the ChipIdea common code and in the drivers
accessing the PHY. This is done by adding a new PHY member in
ChipIdea's structures and by taking care of it in the code.
Signed-off-by: Antoine Tenart
Add the reset binding documentation to the SoC binding documentation as
the reset driver in Marvell Berlin SoC is part of the chip/system
control registers. This patch adds the required properties to configure
the reset controller.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Hi all,
This is an attempt to add more common USB code aware of the generic PHY
framework, while keeping the compatibility for the USB PHY one. It does
not add the full support, some USB PHY specific functions not being
available currently in the generic PHY subsystem (e.g. usb_phy_set_power()).
The USB PHY member of the HCD structure is renamed to 'usb_phy' and
modifications are done in all drivers accessing it.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Alan Stern st...@rowland.harvard.edu
---
drivers/usb/chipidea/host.c | 2 +-
drivers/usb/core/hcd.c
This patch prepares the introduction of the generic PHY support in the
USB OTG common functions. The USB PHY member of the OTG structure is
renamed to 'usb_phy' and modifications are done in all drivers accessing
it. Renaming this pointer will allow to keep the compatibility for USB
PHY drivers.
This patch prepares the introduction of the generic PHY support in the
USB ChipIdea common functions. The USB PHY member of the ChipIdea
structure ('transceiver') is renamed to 'usb_phy', the 'phy' member of
the ChipIdea pdata structure is renamed to 'usb_phy' and modifications
are done in all
Move the usb_otg member from struct usb_phy to struct ci_hdrc. Rework
its initialization taking in account this modification.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/chipidea/ci.h | 1 +
Add a reset controller for Marvell Berlin SoCs which is used by the
USB PHYs drivers (for now).
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Philipp Zabel p.za...@pengutronix.de
---
The state attribute is connected to the kobj of the udc, not the gadget.
Signed-off-by: Andreas Larsson andr...@gaisler.com
---
drivers/usb/gadget/udc/udc-core.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/gadget/udc/udc-core.c
Before using the PHY framework instead of the USB PHY one, we need to
move the OTG state into another place, since it won't be available when
USB PHY isn't used. This patch moves the OTG state into the OTG
structure, and makes all the needed modifications in the drivers
using the OTG state.
On Mon, 2014-09-15 at 08:42 +, David Laight wrote:
From: Alan Stern
You must not add an aditional value for a module parameter without
documenting it in Documentation/kernel-parameters.txt.
How can this work as a 'module parameter'?
It cannot. This parameter is an aid to debugging.
This adds a bounce buffer that handles the end of OUT requests where
req.length is not divisible by ep-ep.maxpacket.
Before this, such requests were rejected as the DMA engine cannot
restrict itself to buffers that are smaller than ep-ep.maxpacket.
Signed-off-by: Andreas Larsson
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Hi,
I just want to know what is need for adding a new USB device to the
cp210x driver?
The new USB Device:
{ USB_DEVICE(0x1D6F, 0x0010) }, /* Seluxit ApS RF Dongle */
Best regards,
Andreas Bomholtz
Seluxit ApS
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On Fri, Sep 12, 2014 at 07:41:56PM +0530, Kishon Vijay Abraham I wrote:
I don't think create lookup should be in host init. If it's dt boot, the
binding should be in dt data or for other boot modes the bindig should be
done
in the board file. This just seems hacky to me.
So are you
On Fri, Sep 12, 2014 at 08:16:01PM +0530, Kishon Vijay Abraham I wrote:
Assume you have 2 phys in your system..
static struct phy_lookup usb_lookup = {
.phy_name = phy-usb.0,
.dev_id = usb.0,
.con_id = usb,
};
static struct phy_lookup sata_lookup =
Hi,
On 09/15/2014 10:42 AM, David Laight wrote:
From: Alan Stern
...
p = quirks;
while (*p) {
@@ -543,6 +544,9 @@ void usb_stor_adjust_quirks(struct usb_device *udev,
unsigned long *fflags)
case 's':
f |= US_FL_SINGLE_LUN;
And set this quirk for the Seagate Expansion Desk (0bc2:2312), as that one
seems to hang upon receiving an ATA_12 or ATA_16 command.
https://bugzilla.kernel.org/show_bug.cgi?id=79511
https://bbs.archlinux.org/viewtopic.php?id=183190
While at it also add missing documentation for the u value for
[Originally reported at
https://bugzilla.kernel.org/show_bug.cgi?id=84611, gregkh told me to
report it here]
My brother's USB 3.0 stick is only recognized as USB 2.0.
I reproduced this bug in kernels 3.14.15, 3.16, and 3.16.2; as built by Debian.
It used to work correctly in 3.14-rc6. The data
On Mon, Sep 15, 2014 at 04:04:12PM +0200, Hans de Goede wrote:
And set this quirk for the Seagate Expansion Desk (0bc2:2312), as that one
seems to hang upon receiving an ATA_12 or ATA_16 command.
https://bugzilla.kernel.org/show_bug.cgi?id=79511
Hi,
On 09/15/2014 04:08 PM, Greg Kroah-Hartman wrote:
On Mon, Sep 15, 2014 at 04:04:12PM +0200, Hans de Goede wrote:
And set this quirk for the Seagate Expansion Desk (0bc2:2312), as that one
seems to hang upon receiving an ATA_12 or ATA_16 command.
On Mon, Sep 15, 2014 at 04:07:30PM +0200, Julian Andres Klode wrote:
[Originally reported at
https://bugzilla.kernel.org/show_bug.cgi?id=84611, gregkh told me to
report it here]
My brother's USB 3.0 stick is only recognized as USB 2.0.
I reproduced this bug in kernels 3.14.15, 3.16, and
if we don't make sure to kill the timer, it could
expire after we have already gated our clocks.
That will trigger a Data Abort exception because
we would try to access register while clock is gated.
Fix that bug.
Cc: sta...@vger.kernel.org # v3.14+
Fixes 869c597 (usb: musb: dsps: add support
On Mon, 15 Sep 2014, Oliver Neukum wrote:
On Mon, 2014-09-15 at 08:42 +, David Laight wrote:
From: Alan Stern
You must not add an aditional value for a module parameter without
documenting it in Documentation/kernel-parameters.txt.
How can this work as a 'module parameter'?
On Sun, 14 Sep 2014, Mark wrote:
Hi,
Shuttle Technology/SCM Microsystems was the OEM manufacturer of SCSI-USB
converter cables sold by various companies including Adaptec [untested
patch posted recently], Ariston Technologies, Belkin [*], Buffalo,
Entrega/Xircom [patch posted recently],
From: Dinh Nguyen dingu...@opensource.altera.com
Hi Ming-Lei,
Thanks for your patch to enable the URB giveback in a tasklet context for
the EHCI driver. I found your patch to fix a USB webcam timeout/stutter
issue on the DWC2 HCD in the SOCFPGA platform.
However, I need your help trying to
From: Dinh Nguyen dingu...@opensource.altera.com
When enabling HCD_BH for the DWC2 HCD, these local_irq_save/local_irq_restore
was causing a timeout with a webcam.
Signed-off-by: Dinh Nguyen dingu...@opensource.altera.com
---
drivers/usb/core/hcd.c | 2 --
1 file changed, 2 deletions(-)
diff
From: Dinh Nguyen dingu...@opensource.altera.com
Enable the support of running URB giveback in tasklet context.
Remove spinlocks around URB giveback as these are not needed when running
in the tasklet.
Signed-off-by: Dinh Nguyen dingu...@opensource.altera.com
---
drivers/usb/dwc2/hcd.c | 6
On Sat, 13 Sep 2014, Joe Lawrence wrote:
Hi Alan,
I've collected 16 crashes since kicking off automated tests a little
over 24 hrs ago.
Each crash hit the BUG in qh_destroy() and the only unique debugging
printk from ehci_stop() was: ehci_stop: ehci-num_async = 0.
What about error
On Mon, 15 Sep 2014 dingu...@opensource.altera.com wrote:
From: Dinh Nguyen dingu...@opensource.altera.com
Hi Ming-Lei,
Thanks for your patch to enable the URB giveback in a tasklet context for
the EHCI driver. I found your patch to fix a USB webcam timeout/stutter
issue on the DWC2 HCD
On 09/15/2014 11:08 AM, Alan Stern wrote:
On Mon, 15 Sep 2014 dingu...@opensource.altera.com wrote:
From: Dinh Nguyen dingu...@opensource.altera.com
Hi Ming-Lei,
Thanks for your patch to enable the URB giveback in a tasklet context for
the EHCI driver. I found your patch to fix a USB
The zte_ev driver is based on code (once) distributed by ZTE that still
appears to originally have been reverse-engineered and bolted onto the
generic driver.
A closer analysis of the zte_ev setup code reveals that it consists of
standard CDC requests (SET/GET_LINE_CODING and
On Mon, Sep 15, 2014 at 12:00 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 12 September 2014 18:37, Andrew Bresticker abres...@chromium.org wrote:
On Tue, Sep 9, 2014 at 1:21 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 8 September 2014 18:22, Andrew Bresticker abres...@chromium.org
On 09/15/2014 11:06 AM, Andrew Bresticker wrote:
On Mon, Sep 15, 2014 at 12:00 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 12 September 2014 18:37, Andrew Bresticker abres...@chromium.org wrote:
On Tue, Sep 9, 2014 at 1:21 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 8 September 2014
Hello.
On 9/15/2014 1:35 PM, Antoine Tenart wrote:
The USB PHY member of the HCD structure is renamed to 'usb_phy' and
modifications are done in all drivers accessing it.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Alan Stern st...@rowland.harvard.edu
---
On 9/15/2014 1:35 PM, Antoine Tenart wrote:
The patch adding support to the generic PHY framework introduced a
'gen_phy' member in the HCD structure. Rename it to 'phy' to have a
consistent USB framework.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Alan Stern
On 09/14/2014 01:52 AM, Mike Mammarella wrote:
On Sat, 26 Jul 2014, Mike Mammarella wrote:
On Fri, 4 Jul 2014, Mathias Nyman wrote:
On 07/01/2014 09:07 AM, Mike Mammarella wrote:
Hi
Can you add xhci debugging by enabling CONFIG_DYNAMIC_DEBUG, and run
`echo -n 'module xhci_hcd =p'
Hi
On 09/13/2014 10:18 AM, Gunter Königsmann wrote:
Dear Mr. Nyman,
I have finally found out why my scanner isn't working and since it
seems like the cause is might be be a kernel bug I thought I'd better
report it.
I hope you are the right person to send this bug report to.
Kind
Can I get some reviews for this patch so that we can get into 3.17-rc?
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On 9/12/14 7:00 PM, Christoph Hellwig wrote:
Please try the fix below, looks like the commit broke TCQ for all drivers
using block-level tagging.
---
From 865a19b760d2786fe37d3b5c151a4ecea4c0e95e Mon Sep 17 00:00:00 2001
From: Christoph Hellwig h...@lst.de
Date: Fri, 12 Sep 2014 16:00:19 -0700
Hi,
On 9/12/14 7:00 PM, Christoph Hellwig wrote:
Please try the fix below, looks like the commit broke TCQ for all drivers
using block-level tagging.
---
From 865a19b760d2786fe37d3b5c151a4ecea4c0e95e Mon Sep 17 00:00:00 2001
From: Christoph Hellwig h...@lst.de
Date: Fri, 12 Sep 2014
On Mon, Sep 15, 2014 at 11:09 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 09/15/2014 11:06 AM, Andrew Bresticker wrote:
On Mon, Sep 15, 2014 at 12:00 AM, Tomeu Vizoso to...@tomeuvizoso.net
wrote:
On 12 September 2014 18:37, Andrew Bresticker abres...@chromium.org
wrote:
On Tue, Sep
Christoph Hellwig h...@infradead.org writes:
Please try the fix below, looks like the commit broke TCQ for all drivers
using block-level tagging.
---
From 865a19b760d2786fe37d3b5c151a4ecea4c0e95e Mon Sep 17 00:00:00 2001
From: Christoph Hellwig h...@lst.de
Date: Fri, 12 Sep 2014 16:00:19
On Mon, 15 Sep 2014, Mathias Nyman wrote:
I haven't had time to dig into the usbmon traces, but I just got another
report from Gunter K�ningsmann about similar scanner problem, and I just
noticed
that in both cases we round the interval for high speed bulk _IN_ endpoint,
which should not
If after applying the patch I still get the warning and the scanner still isn't
working - did I do something wrong?
cat /proc/version is telling me I'm running the kernel I have compiled.
Thanks a lot,
and
Kind regards,
Gunter.
On 15.09.2014 21:50, Alan Stern wrote:
On Mon, 15 Sep
dwc2_hc_setup_align_buf() does a DMA allocation if it needs to
allocate a buffer to handle non-aligned transfers. Pass the gfp_t
flags down the call chain to this function, instead of hard-coding
a GFP_ATOMIC allocation. Also reduce the size of the allocation
for Isoc endpoints to 3K, since that's
The driver's unmapping of DMA buffers for non-aligned transfers
was kind of nuts. For IN transfers, it left the URB DMA buffer
mapped until the transfer completed, then unmapped it, copied the
data from the bounce buffer, then remapped it again.
Instead of that, just unmap the buffer before
Clip max_transfer_size to 65535 for host. dwc2_hc_setup_align_buf()
allocates coherent buffers with this size, and if it's too large we
can exhaust the coherent DMA pool.
Tested on Raspberry Pi and Altera SOCFPGA.
Signed-off-by: Paul Zimmerman pa...@synopsys.com
---
drivers/usb/dwc2/core.c | 7
This is a series of updates to the dwc2 driver, all related
to the handling of non-dword-aligned transfers. I have tested
all of these on the Raspberry Pi and Altera SOCFPGA platforms,
and have not seen any regressions.
Greg, can you apply this series to usb-next, please? Thanks.
--
Paul
Paul
From: dingu...@opensource.altera.com [mailto:dingu...@opensource.altera.com]
Sent: Monday, September 15, 2014 8:23 AM
Hi Ming-Lei,
Thanks for your patch to enable the URB giveback in a tasklet context for
the EHCI driver. I found your patch to fix a USB webcam timeout/stutter
issue on
From: Paul Zimmerman [mailto:pa...@synopsys.com]
Sent: Monday, September 15, 2014 3:28 PM
This is a series of updates to the dwc2 driver, all related
to the handling of non-dword-aligned transfers. I have tested
all of these on the Raspberry Pi and Altera SOCFPGA platforms,
and have not
On Mon, Sep 15, 2014 at 12:35:07PM +0200, Antoine Tenart wrote:
This patch prepares the introduction of the generic PHY support in the
USB ChipIdea common functions. The USB PHY member of the ChipIdea
structure ('transceiver') is renamed to 'usb_phy', the 'phy' member of
the ChipIdea pdata
On Mon, Sep 15, 2014 at 12:35:09PM +0200, Antoine Tenart wrote:
This patch adds support of the PHY framework for ChipIdea drivers.
Changes are done in both the ChipIdea common code and in the drivers
accessing the PHY. This is done by adding a new PHY member in
ChipIdea's structures and by
On Mon, Sep 15, 2014 at 11:22 PM, dingu...@opensource.altera.com wrote:
From: Dinh Nguyen dingu...@opensource.altera.com
Hi Ming-Lei,
Thanks for your patch to enable the URB giveback in a tasklet context for
the EHCI driver. I found your patch to fix a USB webcam timeout/stutter
issue on
On Tue, Sep 16, 2014 at 7:16 AM, Paul Zimmerman
paul.zimmer...@synopsys.com wrote:
From: dingu...@opensource.altera.com [mailto:dingu...@opensource.altera.com]
Sent: Monday, September 15, 2014 8:23 AM
Hi Ming-Lei,
Thanks for your patch to enable the URB giveback in a tasklet context for
the
On Mon, Sep 15, 2014 at 12:36:13PM +0200, Antoine Tenart wrote:
Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
and DMA mask, to support USB2 ChipIdea controllers that don't need
specific functions.
Tested on the Marvell Berlin SoCs USB controllers.
Signed-off-by: Antoine
Hi,
On Tue, Sep 16, 2014 at 08:35:17AM +0800, Ming Lei wrote:
On Tue, Sep 16, 2014 at 7:16 AM, Paul Zimmerman
paul.zimmer...@synopsys.com wrote:
From: dingu...@opensource.altera.com
[mailto:dingu...@opensource.altera.com]
Sent: Monday, September 15, 2014 8:23 AM
Hi Ming-Lei,
On Mon, Sep 15, 2014 at 12:42:27PM +0200, Andreas Larsson wrote:
The state attribute is connected to the kobj of the udc, not the gadget.
Signed-off-by: Andreas Larsson andr...@gaisler.com
---
drivers/usb/gadget/udc/udc-core.c | 14 +-
1 file changed, 13 insertions(+), 1
Hi,
On Tue, Sep 16, 2014 at 10:02:25AM +0800, Peter Chen wrote:
On Mon, Sep 15, 2014 at 12:42:27PM +0200, Andreas Larsson wrote:
The state attribute is connected to the kobj of the udc, not the gadget.
Signed-off-by: Andreas Larsson andr...@gaisler.com
---
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