Greetings.

I have hit a bug using a PPC7448 processor with a PCI EHCI USB
controller. Atomic operations for reference counting are failing
and I am interested to hear what others have to say on this.

Looking in the MPC7450 RISC Microprocessor Family Reference Manual
(MPC7450UM, Rev. 5, 1/2005):

   http://www.freescale.com/files/32bit/doc/ref_manual/MPC7450UM.pdf

On Page 102 in Table 1-2, the DSI 0x300 exception can be caused by:

   "A lwarx or stwcx. instruction to memory with cache-inhibited
    or write-through memory/cache access atrributes."

For the functions qh_get/gh_put in drivers/usb/host/ehci-mem.c,
the kref_get/kref_put functions are called which perform atomic
operations using the PPC atomic assembly instructions.

The problem is that all of the ehci_qh and ehci_qtd blocks are
allocated through dma_pool_alloc which marks all of the pages
cache-inhibit. Thus, whenever the kref functions are called and
the PPC-specific atomic operations are performed, the lwarx and
stwcx instructions are executed causing kernel panics because of
the DSI 0x300 exception.

Currently, I comment out the ref-counting and the EHCI controller
performs perfectly on my 7448 platform. However, this is certainly
not the solution going forward. Is it truly necessary to have the
ref count be in DMA-able memory? I know it is convenient to allocate
the entire structure all at once, but this certainly will not work
for 7448 platforms. Comments? Thanks.

I am not subscribed to the list, please CC: me on replies.

-Steve

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