Am Donnerstag, 15. März 2007 17:29 schrieb David Howells:
> How about the following:
>
>
> INTERRUPT HANDLING
> --
>
> Execution of the interrupt handler chain for an interrupt not bound to a CPU
> is bounded by a lock/unlock at either side. Furthermore, recurrence of that
> in
Oliver Neukum <[EMAIL PROTECTED]> wrote:
> + (*) entering and returning from interrupt handlers implies a full barrier
That shouldn't really be under the "MISCELLANEOUS FUNCTIONS" subheading as
it's not precisely describing a callable function that has barrier effects.
Hmmm... also it isn't quit
Am Donnerstag, 15. März 2007 10:39 schrieb Robert Marquardt:
> Oliver Neukum wrote:
>
> >>> OK, thanks. I am relieved.
> >>> Should I add a section concerning this to Documentation?
> >> Is that a trick question? :-)
> >
> > No.
>
> Your question if it should be documented bears itself the answ
Oliver Neukum wrote:
>>> OK, thanks. I am relieved.
>>> Should I add a section concerning this to Documentation?
>> Is that a trick question? :-)
>
> No.
Your question if it should be documented bears itself the answer.
Of course!
If an expert has doubts then lesser experts and common folk do n
Am Donnerstag, 15. März 2007 09:57 schrieb Robert Marquardt:
> Oliver Neukum wrote:
>
> > OK, thanks. I am relieved.
> > Should I add a section concerning this to Documentation?
>
> Is that a trick question? :-)
No.
Regards
Oliver
---
Oliver Neukum wrote:
> OK, thanks. I am relieved.
> Should I add a section concerning this to Documentation?
Is that a trick question? :-)
-
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Am Donnerstag, 15. März 2007 09:16 schrieb Greg KH:
> On Wed, Mar 14, 2007 at 08:44:22PM +0100, Oliver Neukum wrote:
> > It is called in interrupt and uses no locking. What happens if the next
> > irq is processed on another cpu? Is that cpu guaranteed to see the updates
> > to the incremented var
Am Mittwoch, 14. März 2007 23:44 schrieb David Howells:
> Pete Zaitcev <[EMAIL PROTECTED]> wrote:
>
> > I think he is concerned about CPU A executing an interrupt handler, its
> > stores getting stuck in its store buffer or its write-back cache, the IRQ
> > finished, IRQ get migrated to CPU B, CPU
Pete Zaitcev <[EMAIL PROTECTED]> wrote:
> I think he is concerned about CPU A executing an interrupt handler, its
> stores getting stuck in its store buffer or its write-back cache, the IRQ
> finished, IRQ get migrated to CPU B, CPU B taking next interrupt and seeing
> old RAM state. I don't see
Am Mittwoch, 14. März 2007 22:21 schrieb Pete Zaitcev:
> On Wed, 14 Mar 2007 20:59:29 +, David Howells <[EMAIL PROTECTED]> wrote:
>
> > Oliver Neukum <[EMAIL PROTECTED]> wrote:
> >
> > > It is called in interrupt and uses no locking. What happens if the next
> > > irq is processed on another
On Wed, 14 Mar 2007 20:59:29 +, David Howells <[EMAIL PROTECTED]> wrote:
> Oliver Neukum <[EMAIL PROTECTED]> wrote:
>
> > It is called in interrupt and uses no locking. What happens if the next
> > irq is processed on another cpu? Is that cpu guaranteed to see the updates
> > to the increment
Am Mittwoch, 14. März 2007 21:59 schrieben Sie:
> Oliver Neukum <[EMAIL PROTECTED]> wrote:
>
> > It is called in interrupt and uses no locking. What happens if the next
> > irq is processed on another cpu? Is that cpu guaranteed to see the updates
> > to the incremented variables?
>
> I thought t
Oliver Neukum <[EMAIL PROTECTED]> wrote:
> It is called in interrupt and uses no locking. What happens if the next
> irq is processed on another cpu? Is that cpu guaranteed to see the updates
> to the incremented variables?
I thought that possibility was prevented by IRQ_INPROGRESS.
David
-
Hi,
I am looking at this code:
if (new_msr &
(MOS_MSR_DELTA_CTS | MOS_MSR_DELTA_DSR | MOS_MSR_DELTA_RI |
MOS_MSR_DELTA_CD)) {
icount = &mos7840_port->icount;
/* update input line counters */
if (new_msr & MOS_MSR_DE
On Wed, 14 Mar 2007, Oliver Neukum wrote:
> Hi,
>
> I am looking at this code:
>
> if (new_msr &
> (MOS_MSR_DELTA_CTS | MOS_MSR_DELTA_DSR | MOS_MSR_DELTA_RI |
>MOS_MSR_DELTA_CD)) {
> icount = &mos7840_port->icount;
>
> /* update input line
Hi,
I am looking at this code:
if (new_msr &
(MOS_MSR_DELTA_CTS | MOS_MSR_DELTA_DSR | MOS_MSR_DELTA_RI |
MOS_MSR_DELTA_CD)) {
icount = &mos7840_port->icount;
/* update input line counters */
if (new_msr & MOS_MSR_DE
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