Daniel Mack writes:
> Hi Loic,
>
> On Wednesday, April 11, 2018 03:30 PM, Loic Poulain wrote:
>>> /* Move the head of the ring to the next empty descriptor */
>>> -ch->head_blk_ctl = ctl->next;
>>> +ch->head_blk_ctl = ctl_skb->next;
>>> +
>>> + /* Commit all previous
Hi Loic,
On Wednesday, April 11, 2018 03:30 PM, Loic Poulain wrote:
>> /* Move the head of the ring to the next empty descriptor */
>> -ch->head_blk_ctl = ctl->next;
>> +ch->head_blk_ctl = ctl_skb->next;
>> +
>> + /* Commit all previous writes and set descriptors to V
On 11 April 2018 at 15:37, Daniel Mack wrote:
> Hi Loic,
>
> On Wednesday, April 11, 2018 03:30 PM, Loic Poulain wrote:
>>> /* Move the head of the ring to the next empty descriptor */
>>> -ch->head_blk_ctl = ctl->next;
>>> +ch->head_blk_ctl = ctl_skb->next;
>>> +
>>> +
Hi Loic,
On Wednesday, April 11, 2018 03:30 PM, Loic Poulain wrote:
>> /* Move the head of the ring to the next empty descriptor */
>> -ch->head_blk_ctl = ctl->next;
>> +ch->head_blk_ctl = ctl_skb->next;
>> +
>> + /* Commit all previous writes and set descriptors to V
Hi Daniel,
> /* Move the head of the ring to the next empty descriptor */
> -ch->head_blk_ctl = ctl->next;
> +ch->head_blk_ctl = ctl_skb->next;
> +
> + /* Commit all previous writes and set descriptors to VALID */
> + wmb();
Is this first memory barrier really
When wcn36xx_dxe_tx_frame() is entered while the device is still processing
the queue asyncronously, we are racing against the firmware code with
updates to the buffer descriptors. Presumably, the firmware scans the ring
buffer that holds the descriptors and scans for a valid control descriptor,
an