[linux-yocto]: [kernel v5.10/standard/intel-sdk-5.10/intel-socfpga]: arch: arm64: altera: add dts file to support gpio on FPGA side

From: Limeng Hi Bruce, Based on FPGA ghrd(golden hardware reference design) hw design that includes gpio feature, I created a patch to add corresponding dts file to enable FPGA sw3, FPGA buttion and FPGA led. Could you please help tomerge this patch into linux-ycoto kernel repo, branch v5.10/

[linux-yocto] [PATCH] arch: arm64: altera: add dts file to support gpio on FPGA side

From: Meng Li Based on FPGA ghrd(golden hardware reference design) hw design that includes gpio feature, add corresponding dts file to enable FPGA sw3, FPGA buttion and FPGA led. Signed-off-by: Meng Li --- arch/arm64/boot/dts/altera/Makefile | 2 +- .../altera/socfpga_stratix10_socd

[linux-yocto] [PATCH] arch: arm64: altera: add dts file to support sgmii ethernet on FPGA side

From: Meng Li Based on FPGA hw design that includes sgmii ethernet feature, add corresponding dts file to enable 2 ethernet ports on stratix10 board. Signed-off-by: Meng Li --- arch/arm64/boot/dts/altera/Makefile | 2 +- .../altera/socfpga_stratix10_socdk_sgmii.dts | 85 +++

[linux-yocto]: [kernel v5.10/standard/intel-sdk-5.10/intel-socfpga]: arch: arm64: altera: add dts file to support sgmii ethernet on FPGA side

From: Limeng Hi Bruce, Based on FPGA hw design that includes sgmii ethernet feature, I created a patch to add corresponding dts file to enable 2 ethernet ports on stratix10 board. Could you please help tomerge this patch into linux-ycoto kernel repo, branch v5.10/standard/intel-sdk-5.10/intel-

[linux-yocto][yocto-kernel-cache][yocto-5.10][PATCH] ti-j72xx: add kernel-cache configuration files for BSP ti-j72xx

This adds the cfg & scc files to support the TI J721E soc. Signed-off-by: Xulin Sun --- bsp/ti-j72xx/ti-j72xx-remoteproc.cfg | 21 ++ bsp/ti-j72xx/ti-j72xx-remoteproc.scc | 1 + bsp/ti-j72xx/ti-j72xx-standard.scc | 8 + bsp/ti-j72xx/ti-j72xx.cfg| 344 ++