This reverts commit 20ceb2b50fd5a59825daba5fb82021768afe9f71.
The clock driver clk-imx8qxp-lpcg still uses LPCG bit-offset instead of
clock-indices for clock-controller dts properties, so it can not switch
to use lpcg indices.
Signed-off-by: Xulin Sun <xulin....@windriver.com>
---
arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
index b3a5ab539573..b4eda76d435c 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
@@ -92,15 +92,15 @@ &flexcan1 {
};
&flexcan2 {
- clocks = <&can1_lpcg IMX_LPCG_CLK_4>,
- <&can1_lpcg IMX_LPCG_CLK_0>;
+ clocks = <&can1_lpcg 1>,
+ <&can1_lpcg 0>;
assigned-clocks = <&clk IMX_SC_R_CAN_1 IMX_SC_PM_CLK_PER>;
fsl,clk-source = /bits/ 8 <1>;
};
&flexcan3 {
- clocks = <&can2_lpcg IMX_LPCG_CLK_4>,
- <&can2_lpcg IMX_LPCG_CLK_0>;
+ clocks = <&can2_lpcg 1>,
+ <&can2_lpcg 0>;
assigned-clocks = <&clk IMX_SC_R_CAN_2 IMX_SC_PM_CLK_PER>;
fsl,clk-source = /bits/ 8 <1>;
};
--
2.34.1
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