Add kernel config fragments to enable and build Xilinx kc705-microblazeel bsp features
Signed-off-by: Sai Hari Chandana Kalluri <chandana.kall...@xilinx.com> --- .../kc705-microblazeel-features.cfg | 18 ++++++++++++++++++ .../kc705-microblazeel-features.scc | 5 +++++ 2 files changed, 23 insertions(+) create mode 100644 bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.cfg create mode 100644 bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc diff --git a/bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.cfg b/bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.cfg new file mode 100644 index 0000000..22eb830 --- /dev/null +++ b/bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.cfg @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: MIT +CONFIG_XILINX_MICROBLAZE0_FAMILY="kintex7" + +# CPU ISA Config +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 +CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1 +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 +CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 +CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2 +CONFIG_XILINX_MICROBLAZE0_USE_FPU=0 +CONFIG_XILINX_MICROBLAZE0_HW_VER="11.0" + +# Memory Base Address +CONFIG_KERNEL_BASE_ADDR=0x80000000 + +CONFIG_XILINX_AXI_EMAC=y +CONFIG_XILINX_PHY=y +CONFIG_BLK_DEV_INITRD=y diff --git a/bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc b/bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc new file mode 100644 index 0000000..2f9c2fb --- /dev/null +++ b/bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: MIT +define KFEATURE_DESCRIPTION "Kernel Config for kc705-microblazeel specific setup" +define KFEATURE_COMPATIBILITY board + +kconf hardware kc705-microblazeel-features.cfg -- 2.7.4
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