From: John Jacques <john.jacq...@intel.com>
For Axxia AXM55xx, the U-Boot is kept in the bottom 8M of memory,
so the math in arch/arm/boot/compressed/head.S would "align"
8M to 0M and wipe out U-Boot.
Without this changes, Linux has to be rather severely aligned.
Signed-off-by: John Jacques <john.jacq...@intel.com>
Signed-off-by: Charlie Paul <charlie.p...@windriver.com>
Signed-off-by: Daniel Dragomir <daniel.drago...@windriver.com>
---
arch/arm/boot/compressed/head.S | 12 ++++++++++++
arch/arm/kernel/head.S | 5 +++++
2 files changed, 17 insertions(+)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index e205bbb..cf605eb 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -172,6 +172,8 @@ not_angel:
safe_svcmode_maskall r0
msr spsr_cxsf, r9 @ Save the CPU boot mode in
@ SPSR
+#else
+ teqp pc, #0x0c000003 @ turn off interrupts
#endif
/*
* Note that some cache flushing and other stuff may
@@ -206,7 +208,12 @@ not_angel:
mov r4, pc
and r4, r4, #0xf8000000
/* Determine final kernel image address. */
+#ifdef CONFIG_ARCH_AXXIA
+ ldr r3, =TEXT_OFFSET
+ add r4, r4, r3
+#else
add r4, r4, #TEXT_OFFSET
+#endif
#else
ldr r4, =zreladdr
#endif
@@ -337,7 +344,12 @@ restart: adr r0, LC0
* of RAM and hope for the best.
*/
cmp r0, #1
+#ifdef CONFIG_ARCH_AXXIA
+ ldr r1, =TEXT_OFFSET
+ sub r0, r4, r1
+#else
sub r0, r4, #TEXT_OFFSET
+#endif
bic r0, r0, #1
add r0, r0, #0x100
mov r1, r6
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 90add5d..11b94f7 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -52,8 +52,13 @@
.equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE
.macro pgtbl, rd, phys
+#ifdef CONFIG_ARCH_AXXIA
+ ldr \rd, =(TEXT_OFFSET - PG_DIR_SIZE)
+ add \rd, \rd, \phys
+#else
add \rd, \phys, #TEXT_OFFSET
sub \rd, \rd, #PG_DIR_SIZE
+#endif
.endm
/*
--
2.7.4
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