Bruce,
I resubmitted this request, I had given you the wrong starting point, this
should fix the merge problem
Charlie
The following changes since commit 55bf6f0b78353c34d4910bca7bfc9eed0aff5de4:
Merge branch 'standard/base' into standard/axxia/base (2014-04-01 21:11:34
-0400)
are
From: Anders Berg anders.b...@lsi.com
Added module parameter 'burst' that allows the setup of the DMA controller
preferred burst setting on reads and writes. Set this to 7 for INCR16, 5 for
INCR8, 3 for INCR4 or 0 for singles (no bursts).
Signed-off-by: Anders Berg anders.b...@lsi.com
---
From: John Jacques john.jacq...@lsi.com
Added code to check for the existence of the NAND driver for
3500. If the driver does not exist then the error is returned
gracefully
Signed-off-by: John Jacques john.jacq...@lsi.com
---
drivers/mtd/nand/lsi_acp_nand.c |7 +++
1 file changed, 7
From: Anders Berg anders.b...@lsi.com
Remove some unneeded code from the timer init function. The clocksource and
clockevent devices are all instansiated via clocksource_of_init().
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/mach-axxia/axxia.c | 20
1 file
Second set of patches ready to go.
Anders Berg (9):
i2c-axxia: Avoid timeout when interrupt delayed
dma: lsi-dma32: Add parameter to setup burst size
dma: lsi-dma32: Handle DMA transfer sizes 1MB
ARM: axxia: dts: Enable sp804 timers by default
ARM: axxia: Cleanup timer init code
From: David Mercado david.merc...@windriver.com
The AXM55xx has the PMU IRQ lines from each core in a cluster OR'ed
together. As a workaround for this, a PMU handler extension was created
in the BSP to dynamically call irq_set_affinity() to rotate the PMU IRQ
assignment as needed, in order to
From: Anders Berg anders.b...@lsi.com
One descriptor can only transfer up to 64K 128-bit words. To handle larger
transfers the driver is now able to chain multiple descriptors.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
drivers/dma/lsi-dma32.c | 188
From: Anders Berg anders.b...@lsi.com
Let the timers block be enabled by default in the axm55xx.dsti device-tree
since all systems will need it anyway.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/boot/dts/axm55xx.dtsi |1 -
1 file changed, 1 deletion(-)
diff --git
From: David Mercado david.merc...@windriver.com
The platform CPU die routine was not being called. Added hook to
axxia_platform_cpu_die().
Signed-off-by: David Mercado david.merc...@windriver.com
---
arch/arm/mach-axxia/axxia.h |1 +
arch/arm/mach-axxia/hotplug.c |2 +-
From: Anders Berg anders.b...@lsi.com
Changed the order in which the interrupt conditions are checked in the
interrupt handler. Need to check for transfer-complete before timeout-error,
otherwise a delayed interrupt may report a false timeout error (since the
timeout may expire after the transfer
From: John Jacques john.jacq...@lsi.com
Updated the device trees to suppor the MDIO Clock offset
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/arm/boot/dts/axm5504-emu.dts |2 ++
arch/arm/boot/dts/axm5507-emu.dts |2 ++
arch/arm/boot/dts/axm5516-amarillo.dts |
From: Anders Berg anders.b...@lsi.com
When booting a crash kernel via kexec, the memory specified by the
cpu-release-addr property is not valid physical memory (not part of
the crash kernel reserved memory area). In this case the memory needs an
ioremap to be written.
Signed-off-by: Anders Berg
On 2014-04-28, 1:28 PM, Paul, Charlie wrote:
Bruce,
I resubmitted this request, I had given you the wrong starting point,
this should fix the merge problem
Indeed. This merged as a fastforward to the existing BSP branch and
has now been pushed to the repo.
Bruce
Charlie
The following
On 2014-04-28, 8:13 PM, Charlie Paul wrote:
Second set of patches ready to go.
No complaints from me on this one. All the commits have good short
logs and summaries that explain the changes. Nicely done.
I can't say that I did a detailed tech review of each one, so I'll
trust that testing
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