From: Ville Syrjälä ville.syrj...@linux.intel.com
Set up the chv display PHY lane stagger registers according to
Programming Guide for 1273 CHV eDP/DP/HDMI Display PHY v1.04
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
Reviewed-by: Deepak S deepa...@linux.intel.com
Signed-off-by:
From: Ng Wei Tee wei.tee...@intel.com
Hi all,
This patch is to backport Braswell bug fixes patches that are
available in the upstream kernel into Yocto Project linux
kernel v3.19. These fixes are related to GFX's DRM/i915 kernel
module.
The fixes here fix the following scenarios:
1. Fixes for
From: Ville Syrjälä ville.syrj...@linux.intel.com
Sometimes (exactly when is a bit unclear) DISPLAY_PHY_CONTROL appears to
get corrupted. The values I've managed to read from it seem to have some
pattern but vary quite a lot. The corruption doesn't seem to just happen
when the register is
From: Ville Syrjälä ville.syrj...@linux.intel.com
With recent hardware/firmware there don't appear to be any glitches
on the other PHY when we toggle the cmnreset for the other PHY. So
detangle the cmnlane power wells from one another and let them be
controlled independently.
This reverts commit
From: Magnus Karlsson magnus.karls...@intel.com
This reverts commit c6bc0772d9fff6571364dedfe0bf05b122d3b5c2.
Signed-off-by: Magnus Karlsson magnus.karls...@intel.com
---
arch/arm/mach-axxia/hotplug.c | 30 +++--
arch/arm/mach-axxia/lsi_power_management.c | 189
From: Palani palaniappan.ramanat...@intel.com
The non-atomic variable tx_cnt can be updated simultaneously
from different threads using rionet_start_xmit (Tx) and the
rionet_outb_msg_event (callback) functions. These functions
use different locks: tx_lock for the Tx and lock for the
callback
From: Sangeetha Rao sangeetha@intel.com
Signed-off-by: Sangeetha Rao sangeetha@intel.com
---
arch/arm/mach-axxia/pci.c |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-axxia/pci.c b/arch/arm/mach-axxia/pci.c
index d4dc235..e51a02d 100644
--- a/arch/arm/mach-axxia/pci.c
From: Sangeetha Rao sangeetha@intel.com
Signed-off-by: SangeethaRao sangeetha@intel.com
---
drivers/edac/axxia_edac-l3.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/edac/axxia_edac-l3.c b/drivers/edac/axxia_edac-l3.c
index af29418..2732490 100644
---
From: Anders Berg anders.b...@intel.com
Signed-off-by: Anders Berg anders.b...@intel.com
---
arch/arm/mach-axxia/axxia.c |1 -
drivers/misc/lsi-ncr.c | 219 +++
2 files changed, 73 insertions(+), 147 deletions(-)
diff --git
Hello! Please apply this set of patches to linux-yocto-3.10, on the
following branches
standard/axxia/base
standard/preempt-rt/axxia/base
The patches contain various power management, SMP and PCIe fixes as
well as support for AXXIA AXM35xx TRNG.
Alexander Sverdlin (1):
spi: pl022: Fix race
From: Anders Berg anders.b...@intel.com
Fix sched_clock setup to handle conversions of sched_clock when the frequency
of the clock doesn't evenly divide NSEC_PER_SEC.
To handle this, the conversion from clock ticks to nanoseconds must be done via
a multiplication and a shift (to avoid divide).
From: John Jacques john.jacq...@lsi.com
In some cases, the boot loader will leave the L3 cache in
SFONLY mode. This is required because the early fixup
code in arch/arm/boot/compressed does not flush L3 cache.
This commit causes Linux to enable the L3 cache in the
arch/arm/mach-axxia startup
From: Sreedevi Joshi sreedevi.jo...@intel.com
AXXIA AXM35xx TRNG driver support added.
Signed-off-by: Sreedevi Joshi sreedevi.jo...@intel.com
---
arch/powerpc/boot/dts/acp35xx.dts | 10 +++
drivers/char/hw_random/axxia-rng.c | 56 +++-
2 files changed,
From: Charlie Paul cpaul.windri...@gmail.com
The mach-axxia was not compiling when the SMP was shut off.
This patch puts the correct ifdef's around the code to
fix the problem.
Signed-off-by: Charlie Paul cpaul.windri...@gmail.com
Signed-off-by: John Jacques john.jacq...@intel.com
---
From: Alexander Sverdlin alexander.sverd...@nokia.com
spi: pl022: Fix race in giveback() leading to driver lock-up
Commit fd316941c (spi/pl022: disable port when unused) introduced a race,
which leads to possible driver lock up (easily reproducible on SMP).
The problem happens in giveback()
From: Magnus Karlsson magnus.karls...@intel.com
Set_affinity now returns an error when called from the hotplug
path. This will be in place until we implement a way to migrate
interrupts between clusters during a hotplug operation. Note that
set_affinity from user space works as before.
From: Magnus Karlsson magnus.karls...@intel.com
This reverts commit c15c9b219f4ae722c24a2dc320f27a62ffafde82.
Signed-off-by: Magnus Karlsson magnus.karls...@intel.com
---
arch/arm/mach-axxia/axxia-gic.c | 242 ++-
1 file changed, 112 insertions(+), 130
From: Anders Berg anders.b...@intel.com
Use the generic mmap function to avoid possible deadlock on vmfs_mutex.
Signed-off-by: Anders Berg anders.b...@intel.com
---
fs/vmfs/file.c | 23 +--
1 file changed, 1 insertion(+), 22 deletions(-)
diff --git a/fs/vmfs/file.c
From: Magnus Karlsson magnus.karls...@intel.com
This reverts commit b8dd1bdee59fd5dd8cdc038d802a3a68400066a6.
Signed-off-by: Magnus Karlsson magnus.karls...@intel.com
---
arch/arm/Kconfig | 37 --
arch/arm/mach-axxia/Makefile |2 +-
From: Sreedevi Joshi sreedevi.jo...@intel.com
AXXIA TRNG block driver for random number generation has
been added. This provides HW Random number generation using
AXXIA HW block. When enabled in the device tree,
/dev/hwrng device is available and random numbers can be read
from there.
From: Magnus Karlsson magnus.karls...@intel.com
Adds a choice to hotplug. There are two ways to power down the cpu,
either to a low power mode or completely off. If the power off mode
is selected then the a new option is available to power off the
L2 cache as well.
This code was originally
This series contains a patch that provides AXXIA HW Random Number
Generator support and a minor rapidio fix.
Please apply them to standard/axxia/base.
Cristian Bercaru (1):
rapidio: axxia: fix array initialization
Sreedevi Joshi (1):
char: hwrng: AXXIA HW Random Number Generator support
This patch ensures that 'axxia_rio_ds_port_irq_init' initializes the
right input irq handlers: 'ib_dse_vsid_irq' instead of 'ob_dse_irq'.
Mis-initializing 'ob_dse_irq' also caused an array index out of
bounds exception. The size of 'ob_dse_irq' is 16
(RIO_MAX_NUM_OBDS_DSE), while the init index
From: Sreedevi Joshi sreedevi.jo...@intel.com
AXXIA TRNG block driver for random number generation has
been added. This provides HW Random number generation using
AXXIA HW block. When enabled in the device tree,
/dev/hwrng device is available and random numbers can be read
from there.
On 2015-05-15 10:44 AM, Cristian Bercaru wrote:
This series contains a patch that provides AXXIA HW Random Number
Generator support and a minor rapidio fix.
Please apply them to standard/axxia/base.
merged.
Bruce
Cristian Bercaru (1):
rapidio: axxia: fix array initialization
Sreedevi
On 2015-05-15 08:24 AM, Cristian Bercaru wrote:
Hello! Please apply this set of patches to linux-yocto-3.10, on the
following branches
standard/axxia/base
The series applied here.
standard/preempt-rt/axxia/base
But failed here.
Am I missing the series that syncs the baseline of the
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