From: Li Jun
Init and update otg capabilities by DT, set gadget's otg capabilities
accordingly.
Acked-by: Peter Chen
Reviewed-by: Roger Quadros
Signed-off-by: Li Jun
Signed-off-by: Felipe Balbi
From: Heikki Krogerus
PCI IDs for Broxton based platforms.
Signed-off-by: Heikki Krogerus
Signed-off-by: Felipe Balbi
(cherry picked from commit b4c580a43d520b7812c0fd064fbab929ce2f1da0)
Signed-off-by: Wan Ahmad
From: Heikki Krogerus
Registers DWC3's ULPI interface with the ULPI bus when it's
available.
Signed-off-by: Heikki Krogerus
Acked-by: David Cohen
Signed-off-by: Felipe Balbi
(cherry
From: John Youn
Certain Synopsys prototyping PHY boards are not able to meet timings
constraints for LPM. This allows the PHY to meet those timings by
leaving the PHY clock running during suspend.
Cc: # v3.18+
Signed-off-by: John Youn
From: Felipe Balbi
commit 3e10a2ce98d1 ("usb: dwc3: add hsphy_interface
property") introduced a possible NULL pointer
dereference because dwc->hsphy_interface can be
NULL.
In order to fix it, all we have to do is guard
strncmp() against a NULL argument.
Fixes: 3e10a2ce98d1 ("usb:
From: Heikki Krogerus
This allows dwc3_phy_setup() to be more useful later. There
is nothing preventing the PHY configuration registers from
being programmed early. They do not loose their context in
soft reset.
There are however other PHY related operations
From: Heikki Krogerus
By using the unified device property interface, the function
can be made available for all platforms and not just the
ones using DT.
Signed-off-by: Heikki Krogerus
Signed-off-by: Felipe Balbi
From: Heikki Krogerus
On some BYT platforms the USB2 PHY needs to be put into
operational mode by the controller driver with GPIOs
controlling the PHYs reset and cs signals.
Signed-off-by: Heikki Krogerus
Signed-off-by: Felipe
From: Heikki Krogerus
No functional affect on existing platforms, but the driver
is now ready to extract the properties also from ACPI tables
as well as from DT.
Signed-off-by: Heikki Krogerus
Signed-off-by: Felipe Balbi
From: Heikki Krogerus
Sharing the ACPI companion with dwc3 core so it has access
to the properties defined for DWC3 in ACPI tables.
Signed-off-by: Heikki Krogerus
Signed-off-by: Felipe Balbi
(cherry picked from
From: Phil Edworthy
These changes allow a PHY driver to trigger a VBUS interrupt and
to provide the value of VBUS.
Reviewed-by: Laurent Pinchart
Signed-off-by: Phil Edworthy
Signed-off-by: Felipe Balbi
From: Heikki Krogerus
By using the unified device property interface, the function
can be made available for all platforms and not just the
ones using DT.
Signed-off-by: Heikki Krogerus
Signed-off-by: Felipe Balbi
From: Heikki Krogerus
So it can be called from other places later.
Signed-off-by: Heikki Krogerus
Acked-by: David Cohen
Signed-off-by: Felipe Balbi
(cherry picked from commit
From: Nikhil Badola
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run
Signed-off-by: Nikhil
From: Heikki Krogerus
of_usb_get_dr_mode will be converted into more generic
usb_get_dr_mode function that will take struct device
instead of struct device_node as its parameter.
To make the conversion possible later, waiting for the
platform device for dwc3 to
From: Bin Liu
Set musb config->maximum_speed based on the dts setting to control musb
speed.
By default musb works in high-speed mode. Adding
maximum-speed = "full-speed";
to dts usb node will force musb to full-speed mode.
Signed-off-by: Bin Liu
From: Heikki Krogerus
So they are available when ULPI interface support is added.
Signed-off-by: Heikki Krogerus
Acked-by: David Cohen
Signed-off-by: Felipe Balbi
(cherry picked
From: Heikki Krogerus
We need to store it before phys are handled, so we can later
use it in ULPI interface support code.
Signed-off-by: Heikki Krogerus
Acked-by: David Cohen
Signed-off-by: Felipe
From: Heikki Krogerus
Make selection between ULPI and UTMI+ interfaces possible by
providing definition for the bit in Global USB2 PHY
Configuration Register that controls it.
Signed-off-by: Heikki Krogerus
Acked-by: David Cohen
From: Heikki Krogerus
Definitions for Global USB2 PHY Vendor Control Register
bits. We will need them to access ULPI PHY registers later.
Signed-off-by: Heikki Krogerus
Acked-by: David Cohen
From: Heikki Krogerus
UTMI+ Low Pin Interface (ULPI) is a commonly used PHY
interface for USB 2.0. The ULPI specification describes a
standard set of registers which the vendors can extend for
their specific needs. ULPI PHYs provide often functions
such as
From: Wan Ahmad Zainie
Hi Bruce.
These patches are the USB backports for Apollo Lake/Broxton,
upstreamed to the mainline Linux kernel by Heikki Krogerus.
The patch usb: dwc3: core: avoid NULL pointer dereference is to
guard against a possible NULL
On 2016-03-10 2:58 PM, Saul Wold wrote:
From: Jussi Laako
Galileo gen 2 has support for setting GPIO modes. Expose these
properties through the GPIO sysfs interface. This approach is bit hacky,
since it changes the interface semantics.
The original patch was by
From: Jussi Laako
Galileo gen 2 has support for setting GPIO modes. Expose these
properties through the GPIO sysfs interface. This approach is bit hacky,
since it changes the interface semantics.
The original patch was by Josef Ahmad
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